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参数资料
| 型号： | S29CL032J0RQAI033 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 1M X 32 FLASH 3.3V PROM, 48 ns, PQFP80 |
| 封装： | PLASTIC, MO-108CB-1, QFP-80 |
| 文件页数： | 33/79页 |
| 文件大小： | 2994K |
| 代理商： | S29CL032J0RQAI033 |
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March 30, 2009 S29CD-J_CL-J_00_B3
S29CD-J & S29CL-J Flash Family
39
Data
She e t
Figure 8.8 Toggle Bit Algorithm
Notes
1. Read toggle bit with two immediately consecutive reads to determine whether or not it is toggling.
2. Recheck toggle bit because it may stop toggling as DQ5 changes to 1.
8.8.5
DQ5: Exceeded Timing Limits
DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under
these conditions DQ5 produces a 1. This is a failure condition that indicates the program or erase cycle was
not successfully completed.
The DQ5 failure condition may appear if the system tries to program a 1 to a location that is previously
programmed to 0. Only an erase operation can change a 0 back to a 1. Under this condition, the device halts
the operation, and when the operation has exceeded the timing limits, DQ5 produces a 1.
Under both these conditions, the system issues the reset command to return the device to reading array data.
START
No
Yes
DQ5 = 1?
No
Yes
DQ6 = Toggle?
No
Read Byte
(DQ0-DQ7)
Address = VA
DQ6 = Toggle?
Read Byte Twice
(DQ0-DQ7)
Adrdess = VA
Read Byte
(DQ0-DQ7)
Address = VA
FAIL
PASS
(Notes 1, 2)
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| SMCP-67201AV-25SHXXX | 512 X 9 OTHER FIFO, 25 ns, CDIP28 |
| SL0-67201AL-25SB | 512 X 9 OTHER FIFO, 25 ns, UUC28 |
| SL0-67201AL-30MHXXX | 512 X 9 OTHER FIFO, 30 ns, UUC28 |
| SLDP-67201AV-40FHXXX | 512 X 9 OTHER FIFO, 40 ns, CDFP28 |
| SL0-67201AL-40 | 512 X 9 OTHER FIFO, 40 ns, UUC28 |
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