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参数资料
| 型号： | S29CL032J0RQAI033 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | 1M X 32 FLASH 3.3V PROM, 48 ns, PQFP80 |
| 封装： | PLASTIC, MO-108CB-1, QFP-80 |
| 文件页数： | 29/79页 |
| 文件大小： | 2994K |
| 代理商： | S29CL032J0RQAI033 |
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March 30, 2009 S29CD-J_CL-J_00_B3
S29CD-J & S29CL-J Flash Family
35
Data
She e t
8.8.1
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host system whether an Embedded Program or Erase algorithm
is in progress or completed, or whether a bank is in Erase Suspend. Data# Polling is valid after the rising
edge of the final WE# pulse in the command sequence. Note that Data# Polling returns invalid data for the
address being programmed or erased.
During the Embedded Program algorithm, the device outputs on DQ7 the complement of the datum
programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend. When the
Embedded Program algorithm is complete, the device outputs the datum programmed to DQ7. The system
must provide the program address to read valid status information on DQ7.
If a program address falls within a protected sector, Data# polling on DQ7 is active for approximately 1 s,
then that bank returns to the read mode without programming the sector. If an erase address falls within a
protected sector, Toggle BIT (DQ6) is active for 150 s, then the device returns to the read mode without
erasing the sector. Please note that Data# polling (DQ7) may give misleading status when an attempt is
made to program or erase a protected sector.
During the Embedded Erase Algorithm, Data# polling produces a “0” on DQ7. When the Embedded Erase
algorithm is complete Data# Polling produces a “1” on DQ7. The system must provide an address within any
of the sectors selected for erasure to read valid status information on DQ7.
In asynchronous mode, just prior to the completion of an Embedded Program or Erase operation, DQ7 may
change asynchronously with DQ6-DQ0 while Output Enable (OE#) is asserted low. That is, the device may
change from providing status information to valid data on DQ7. Depending on when the system samples the
DQ7 output, it may read the status or valid data. Even if the device has completed the program or erase
operation and DQ7 has valid data, the data outputs on DQ6-DQ0 may be still invalid. Valid data on DQ7-D00
appears on successive read cycles.
See the following for more information: Table 8.9, Write Operation Status on page 40 shows the outputs for
Data# Polling on DQ7. Figure 8.7, Data# Polling Algorithm, on page 36 shows the Data# Polling timing
diagram.
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