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参数资料
型号： SC16C850IET,157
厂商： NXP Semiconductors
文件页数： 52/55页
文件大小： 0K
描述： IC UART SINGLE W/FIFO 36-TFBGA
标准包装： 2,450
特点： 可编程
通道数： 1，UART
FIFO's： 128 字节
规程： RS485
电源电压： 2.5 V ~ 3.3 V
带自动流量控制功能： 是
带IrDA 编码器/解码器： 是
带故障启动位检测功能： 是
带调制解调器控制功能： 是
带CMOS： 是
安装类型： 表面贴装
封装/外壳： 36-TFBGA
供应商设备封装： 36-TFBGA（3.5x3.5）
包装： 托盘
其它名称： 935284685157
SC16C850IET
SC16C850IET-ND
SC16C850
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 11 November 2010
6 of 55
NXP Semiconductors
SC16C850
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/decoder
5.2 Pin description
a. 16 mode
b. 68 mode
Fig 5.
Pin configuration for HVQFN32
002aad024
Transparent top view
A2
TX
CS
A1
RX
A0
D7
INT
D6
D5
DTR
16
D4
CTS
LOWPWR
XTAL1
XTAL2
IOW
V
SS
IOR
n.c.
D3
D2
D1
D0
V
DD
RI
CD
DSR
8
17
7
18
6
19
5
20
4
21
3
22
2
23
1
24
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
terminal 1
index area
RTS
RESET
SC16C850IBS
SC16C850IBS/Q900
(16 mode)
002aad025
Transparent top view
A2
TX
CS
A1
RX
A0
D7
IRQ
D6
D5
DTR
68
D4
CTS
LOWPWR
XTAL1
XTAL2
R/W
V
SS
V
DD
n.c.
D3
D2
D1
D0
V
DD
RI
CD
DSR
8
17
7
18
6
19
5
20
4
21
3
22
2
23
1
24
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
terminal 1
index area
RTS
RESET
SC16C850IBS
SC16C850IBS/Q900
(68 mode)
Table 2.
Pin description
Symbol
Pin
Type
Description
TFBGA36
HVQFN32
16/68
-2
I
Bus select. Intel or Motorola bus select.
When 16/68 pin is at logic 1 or left unconnected (internally pulled-up) the
device will operate in Intel bus (16 mode) type of interface.
When 16/68 pin is at logic 0, the device will operate in Motorola bus (68 mode)
type of interface.
A0
C1
19
I
Address 0 select bit. Internal register address selection.
A1
C3
18
I
Address 1 select bit. Internal register address selection.
A2
B1
17
I
Address 2 select bit. Internal register address selection.
CD
E3
26
I
Carrier Detect (active LOW). A logic 0 on this pin indicates that a carrier has
been detected by the modem. Status can be tested by reading MSR[7].
CS
B6
8
I
Chip Select (active LOW). In 16 mode or 68 mode, this input is chip select for
the UART.
CTS
D3
24
I
Clear to Send (active LOW). A logic 0 on the CTS pin indicates the modem
or data set is ready to accept transmit data from the SC16C850. Status can be
tested by reading MSR[4].
DSR
F2
25
I
Data Set Ready (active LOW). A logic 0 on this pin indicates the modem or
data set is powered-on and is ready for data exchange with the UART. Status
can be tested by reading MSR[5].
DTR
E1
22
O
Data Terminal Ready (active LOW). A logic 0 on this pin indicates that the
SC16C850 is powered-on and ready. This pin can be controlled via the
modem control register. Writing a logic 1 to MCR[0] will set the DTR output to
logic 0, enabling the modem. This pin will be a logic 1 after writing a logic 0 to
MCR[0], or after a reset.
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