参数资料
型号: SI3225DC0-EVB
厂商: Silicon Laboratories Inc
文件页数: 39/112页
文件大小: 0K
描述: DAUGHTER CARD W/SI3200 INTERFACE
标准包装: 1
系列: ProSLIC®
主要目的: 接口,模拟前端(AFE)
已用 IC / 零件: Si3225
已供物品: 板,CD
Si3220/25 Si3200/02
32
Rev. 1.3
Not
Recommended
fo
r N
ew
D
gn
s
battery supply that is provided. Because the battery
supply depends on the state of the input supply (i.e.,
charging, discharging, or battery backup mode), the
user must decide how much loop current is required and
determine the maximum loop impedance that can be
driven based on the battery supply provided. The
minimum battery supply required can be calculated with
the following equation:
where VCM and VOV are provided in Table 8 on page 15.
The default VCM value of 3 V provides sufficient
overhead for a 3.1 dBm signal into a 600
loop
impedance with an ILIM setting of 22 mA and an ABIAS
setting of 4 mA. A VOV value of 4 V provides sufficient
headroom to source a maximum ILOOP of 45 mA with a
3.1 dBm audio signal and an ABIAS setting of 16 mA.
For a typical operating condition of VBAT = –56 V and
ILIM =22mA:
These conditions apply when the dc-sensing inputs
(STIPDCa/b and SRINGDCa/b) are placed on the SLIC
side of any protection resistance placed in series with
the TIP and RING leads. If line-side sensing is desired,
both VOV and VCM must be increased by a voltage
equal to RPROT xILIM where RPROT is the value of each
protection resistor. Other safety precautions may also
apply.
During Ringing" on page 54 for details on calculating the
overhead voltage during the ringing state.
The Dual ProSLIC chipset uses both voltage and
current information to control TIP and RING. Sense
resistor RDC measures dc line voltages on TIP and
RING; Capacitor CAC couples the ac line voltages on
the TIP and RING leads to be measured. The Si3220
and Si3225 both use the Si3200/2 to drive TIP and
RING and isolate the high-voltage line from the low-
voltage CMOS devices.
The Si3220 and Si3225 measure voltage at various
nodes to monitor the linefeed current. RDC and RBAT
provide these measuring points. The sense circuitry is
calibrated on-chip to guarantee measurement accuracy.
Figure 15. Simplified Dual ProSLIC Linefeed Architecture for TIP and RING Leads
(Diagram Illustrates either TIP or RING Lead of a Single Channel)
V
BAT
V
OC
V
CM
V
OV
++
V
OC MAX
56 V
3 V
4 V
+
49 V
==
DSP
A/D
D/A
A/D
SLIC
Control
Audio
Control
SLIC
Control
Loop
Audio
Control
Loop
V
BAT Sense
R
DC
R
BAT
TIP or
RING
C
AC
Si3220/
Si3225
Monitor A/D
SLIC DAC
Current
Mirror
Battery
Select
Control
V
BAT
V
BATH
Si3200/2
Low
Frequency
Diagnostic
Filters
Audio
Diagnostic
Filters
Audio
Codec
V
BATL
SV
BAT
BA
TSEL
STIPD
C
/S
R
ING
DC
ITIPP/IRING
P
IT
IPN/IRING
N
STIPAC
/S
RINGA
C
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