参数资料
型号: SPD6729QCE
厂商: INTEL CORP
元件分类: 总线控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封装: MQFP-208
文件页数: 74/116页
文件大小: 1442K
代理商: SPD6729QCE
PD6729 — PCI-to-PC Card (PCMCIA) Controller
60
Datasheet
8.0
I/O Window Mapping Registers
Caution:
Be sure that the I/O windows do not map to the Base Address 0 register programmed at offset 10h.
8.1
I/O Window Control
Bit 0: I/O Window 0 Size
When bit 1 if this register is a ‘0’, this bit determines the width of the data path for I/O Window 0
accesses to the card. When bit 1 is a ‘1’, this bit is ignored.
Bit 1: Auto-Size I/O Window 0
This bit controls the method that the width of the data path for I/O Window 0 accesses to the card is
determined. Note that when this bit is a ‘1’, the -IOIS16 signal (see Table 2) determines the width
of the data path to the card.
Bit 3: Timing Register Select 0
This bit determines the access timing specification (“Timing Registers” on page 87) for I/O
Window 0.
Register Name: I/O Window Control
Index: 07h
Register Per: socket
Register Compatibility Type: 365
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Timing
Register
Select 1
Compatibility
Bit
Auto-Size I/O
Window 1
I/O Window 1
Size
Timing
Register
Select 0
Compatibility
Bit
Auto-Size I/O
Window 0
I/O Window 0
Size
RW:0
0
8-bit data path to I/O Window 0.
1
16-bit data path to I/O Window 0.
0
I/O Window 0 Size (see bit 0 of this register) determines the data path for I/O Window 0
accesses.
1
The data path to I/O Window 0 is determined by the -IOIS16 level returned by the card.
0
Accesses made with timing specified in Timer Set 0 registers.
1
Accesses made with timing specified in Timer Set 1 registers.
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