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参数资料
| 型号： | ST7267R8T1L/XXX |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 30 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封装： | 10 X 10 MM, LEAD FREE, TQFP-64 |
| 文件页数： | 112/189页 |
| 文件大小： | 1643K |
| 代理商： | ST7267R8T1L/XXX |
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6 ST7 I/O PORTS
6.1 INTRODUCTION
The I/O ports allow data transfer. An I/O port can
contain up to 8 pins. Each pin can be programmed
independently either as a digital input or digital
output. In addition, specific pins may have several
other functions. These functions can include exter-
nal interrupt, alternate signal input/output for on-
chip peripherals or analog input.
6.2 FUNCTIONAL DESCRIPTION
A Data Register (DR) and a Data Direction Regis-
ter (DDR) are always associated with each port.
The Option Register (OR), which allows input/out-
put options, may or may not be implemented. The
following description takes into account the OR
register. Refer to the Port Configuration table for
Device specific information.
An I/O pin is programmed using the corresponding
bits in the DDR, DR and OR registers: bit x corre-
sponding to pin x of the port.
Figure 12 shows the generic I/O block diagram.
6.2.1 Input Modes
Clearing the DDRx bit selects input mode. In this
mode, reading its DR bit returns the digital value
from that I/O pin.
If an OR bit is available, different input modes can
be configured by software: floating or pull-up. Re-
fer to I/O Port Implementation section for configu-
ration.
Note: Writing to the DR modifies the latch value
but does not change the state of the input pin.
External Interrupt Function
In input mode, external interrupts can be enabled
by setting the corresponding bit in the PxEIENR
register.
Falling or rising edge sensitivity is programmed in-
dependently for each interrupt vector. The Exter-
nal Interrupt Control Register (EICR) controls this
sensitivity.
Several pins may be tied to one external interrupt
vector. Refer to Pin Description to see which ports
have external interrupts.
External interrupts are hardware interrupts. Fetch-
ing the corresponding interrupt vector automatical-
ly clears the request latch. Modifying the sensitivity
bits will clear any pending interrupts.
6.2.2 Output Modes
Setting the DDRx bit selects output mode. Writing
to the DR bits applies a digital value to the I/O
through the latch. Reading the DR bits returns the
previously stored value.
If an OR bit is available, different output modes
can be selected by software: push-pull or open-
drain. Refer to I/O Port Implementation section for
configuration.
Table 10. DR value and output pin status
Note: When switching from input to output mode,
first set the DR bit to set the correct level to be ap-
plied on the pin, then write the DDR to configure
the pin as an output.
6.2.3 Alternate Functions
Many I/Os of the Device have one or more alter-
nate functions to output. This may include output
signals from, or input signals to, on-chip peripher-
als. The Device Pin Description table describes
which peripheral signals can be input/output to
which ports.
A signal coming from an on-chip peripheral can be
output on an I/O. To do this, enable the on-chip
peripheral as an output (enable bit in the peripher-
al’s control register). The peripheral configures the
I/O as an output and takes priority over standard I/
O programming. The I/O’s state is readable by ad-
dressing the corresponding I/O data register.
Configuring an I/O as floating enables alternate
function input. It is not recommended to configure
an I/O as pull-up as this will increase current con-
sumption. Before using an I/O as an alternate in-
put, configure it without interrupt. Otherwise spuri-
ous interrupts can occur.
Configure an I/O as input floating for an on-chip
peripheral signal which can be input and output.
Caution:
I/Os which can be configured as both an analog
and digital alternate function need special atten-
tion. The user must control the peripherals so that
the signals do not arrive at the same time on the
same pin. If an external clock is used, only the
clock alternate function should be employed on
that I/O pin and not the other alternate function.
DR
Push-Pull
Open-Drain
0VOL
VOL
1VOH
Floating
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