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参数资料
| 型号： | SYM53C180I2 |
| 厂商： | LSI CORP |
| 元件分类： | 总线控制器 |
| 英文描述： | SCSI BUS CONTROLLER, PBGA192 |
| 封装： | 23 X 23 MM, 1.27 MM PITCH, PLASTIC, BGA-192 |
| 文件页数： | 24/78页 |
| 文件大小： | 1073K |
| 代理商： | SYM53C180I2 |
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2-12
Functional Descriptions
for an external chip reset if the power supply meets ramp up
specications.
2.1.8.2 Warm Swap Enable (WS_ENABLE)
This input removes the chip from an active bus without disturbing the
current SCSI transaction (for Warm Swap). When Warm Swap Enable is
asserted, after detection of the next bus free state, the SCSI signals are
3-stated. This occurs so that the SYM53C180 no longer passes through
signals until the WS_ENABLE pin is deasserted HIGH and both SCSI
buses enter the Bus Free state. As an indication that the chip is idle, or
ready to be warm swapped, the XFER_ACTIVE signal deasserts LOW.
An LED or some other indicator could be connected to the
XFER_ACTIVE signal. This feature of WS_ENABLE is to isolate buses
in certain situations.
2.1.8.3 Transfer Active (XFER_ACTIVE)
This output is an indication that the chip has nished its internal testing,
the SCSI bus has entered a Bus Free state, and SCSI trafc can now
Table 2.3
RESET/ Control Signal Polarity
Signal Level State
Effect
LOW = 0
Asserted
Reset is forced to all internal SYM53C180 elements.
HIGH = 1
Deasserted SYM53C180 is not in a forced reset state.
Table 2.4
WS_ENABLE Signal Polarity
Signal Level
State
Effect
LOW = 0
Asserted
The SYM53C180 is requested to go off-line
after detection of a SCSI Bus Free state.
HIGH = 1
Deasserted
The SYM53C180 is enabled to run normally.
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