
SPRS372H – MAY 2007 – REVISED APRIL 2012
2.7.3
Related Documentation From Texas Instruments
The following documents describe the devices. Copies of these documents are available on the Internet at
www.ti.com. Tip: Enter the literature number in the search box provided at www.ti.com.
The current documentation that describes the DM64x DMP, related peripherals, and other technical
TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide describes the CPU
architecture, pipeline, instruction set, and interrupts for the TMS320C64x and TMS320C64x+
digital signal processors (DSPs) of the TMS320C6000 DSP family. The C64x/C64x+ DSP
generation comprises fixed-point devices in the C6000 DSP platform. The C64x+ DSP is an
enhancement of the C64x DSP with added functionality and an expanded instruction set.
TMS320DM647/DM648 DSP DDR2 Memory Controller User's Guide describes the DDR2
memory controller in the TMS320DM647/DM648 Digital Signal Processor (DSP). The
DDR2/mDDR memory controller is used to interface with JESD79D-2A standard compliant
DDR2 SDRAM devices and standard Mobile DDR SDRAM devices.
TMS320DM647/DM648 DSP External Memory Interface (EMIF) User's Guide describes
the
operation
of
the
asynchronous
external
memory
interface
(EMIF)
in
the
TMS320DM647/DM648 Digital Signal Processor (DSP). The EMIF supports a glueless
interface to a variety of external devices.
TMS320DM647/DM648
DSP
General-Purpose
Input/Output
(GPIO)
User's
Guide
describes the general-purpose input/output (GPIO) peripheral in the TMS320DM647/DM648
Digital Signal Processor (DSP). The GPIO peripheral provides dedicated general-purpose
pins that can be configured as either inputs or outputs. When configured as an input, you
can detect the state of the input by reading the state of an internal register. When configured
as an output, you can write to an internal register to control the state driven on the output
pin.
TMS320DM647/DM648 DSP Inter-Integrated Circuit (I2C) Module User's Guide describes
the inter-integrated circuit (I2C) peripheral in the TMS320DM647/DM648 Digital Signal
Processor (DSP). The I2C peripheral provides an interface between the DSP and other
devices compliant with the I2C-bus specification and connected by way of an I2C-bus.
External components attached to this 2-wire serial bus can transmit and receive up to 8-bit
wide data to and from the DSP through the I2C peripheral. This document assumes the
reader is familiar with the I2C-bus specification.
TMS320DM647/DM648 DSP 64-Bit Timer User's Guide describes the operation of the 64-
bit timer in the TMS320DM647/DM648 Digital Signal Processor (DSP). The timer can be
configured as a general-purpose 64-bit timer or dual general-purpose 32-bit timers.
TMS320DM647/DM648 DSP Multichannel Audio Serial Port (McASP) User's Guide
describes the multichannel audio serial port (McASP) in the TMS320DM647/DM648 Digital
Signal Processor (DSP). The McASP functions as a general-purpose audio serial port
optimized for the needs of multichannel audio applications. The McASP is useful for time-
division
multiplexed
(TDM)
stream,
Inter-Integrated
Sound
(I2S)
protocols,
and
intercomponent digital audio interface transmission (DIT).
TMS320DM647/DM648 DSP Enhanced DMA (EDMA) Controller User's Guide describes
the operation of the enhanced direct memory access (EDMA3) controller in the
TMS320DM647/DM648 Digital Signal Processor (DSP). The EDMA3 controller’s primary
purpose is to service user-programmed data transfers between two memory-mapped slave
endpoints on the DSP.
TMS320DM647/DM648 DSP Peripheral Component Interconnect (PCI) User's Guide
describes the peripheral component interconnect (PCI) port in the TMS320DM647/DM648
Digital Signal Processor (DSP). The PCI port supports connection of the C642x DSP to a
36
Device Overview
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