参数资料
型号: TMX320C6203CGNZ
厂商: TEXAS INSTRUMENTS INC
元件分类: 数字信号处理
英文描述: 32-BIT, 300 MHz, OTHER DSP, PBGA352
封装: PLASTIC, BGA-352
文件页数: 42/101页
文件大小: 1470K
代理商: TMX320C6203CGNZ
TMS320C6203B, TMS320C6203C
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SPRS086G – JANUARY 1999 – REVISED JANUARY 2002
45
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
INPUT AND OUTPUT CLOCKS (CONTINUED)
timing requirements for XCLKIN (see Figure 12)
NO.
C6203B-250
C6203B-300
C6203C-300
UNIT
MIN
MAX
1
tc(XCLKIN)
Cycle time, XCLKIN
4P
ns
2
tw(XCLKINH) Pulse duration, XCLKIN high
1.8P
ns
3
tw(XCLKINL)
Pulse duration, XCLKIN low
1.8P
ns
P = 1/CPU clock frequency in nanoseconds (ns).
XCLKIN
1
2
3
Figure 12. XCLKIN Timings
switching characteristics over recommended operating conditions for CLKOUT2§ (see Figure 13)
NO.
PARAMETER
C6203B-250
C6203B-300
C6203C-300
UNIT
MIN
MAX
1
tc(CKO2)
Cycle time, CLKOUT2
2P – 0.7
2P + 0.7
ns
2
tw(CKO2H)
Pulse duration, CLKOUT2 high
P – 0.7
P + 0.7
ns
3
tw(CKO2L)
Pulse duration, CLKOUT2 low
P – 0.7
P + 0.7
ns
For the C6203B device only, P = 1/CPU clock frequency in ns.
For the C6203C device only:
If the SCRT (XD7 pin) is pulled down (0) then, P = 1/CPU clock frequency in ns.
If the SCRT (XD7 pin) is pulled up (1) then, P = 2(1/CPU clock frequency in ns).
§ The reference points for the rise and fall transitions are measured at VOL MAX and VOH MIN.
CLKOUT2
1
3
2
Figure 13. CLKOUT2 Timings
PRODUCT
PREVIEW
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