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参数资料
| 型号： | UPSD3253B-40T6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP52 |
| 封装： | PLASTIC, TQFP-52 |
| 文件页数： | 133/189页 |
| 文件大小： | 1638K |
| 代理商： | UPSD3253B-40T6 |
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Obsolete
Product(s)
- Obsolete
Product(s)
Interrupt system
UPSD3254A, UPSD3254BV, UPSD3253B, UPSD3253BV
5.11
How interrupts are handled
The interrupt flags are sampled at S5P2 of every machine cycle. The samples are polled
during following machine cycle. If one of the flags was in a set condition at S5P2 of the
preceding cycle, the polling cycle will find it and the interrupt system will generate an LCALL
to the appropriate service routine, provided this H/W generated LCALL is not blocked by any
of the following conditions:
●
An interrupt of equal priority or higher priority level is already in progress.
●
The current machine cycle is not the final cycle in the execution of the instruction in
progress.
●
The instruction in progress is RETI or any access to the interrupt priority or interrupt
enable registers.
The polling cycle is repeated with each machine cycle, and the values polled are the values
that were present at S5P2 of the previous machine cycle.
Note:
If an interrupt flag is active but being responded to for one of the above mentioned
conditions, if the flag is still inactive when the blocking condition is removed, the denied
interrupt will not be serviced. In other words, the fact that the interrupt flag was once active
but not serviced is not remembered. Every polling cycle is new.
The processor acknowledges an interrupt request by executing a hardware generated
LCALL to the appropriate service routine. The hardware generated LCALL pushes the
contents of the Program Counter on to the stack (but it does not save the PSW) and reloads
the PC with an address that depends on the source of the interrupt being vectored to as
shown in Table 24.
Execution proceeds from that location until the RETI instruction is encountered. The RETI
instruction informs the processor that the interrupt routine is no longer in progress, then
pops the top two bytes from the stack and reloads the Program Counter. Execution of the
interrupted program continues from where it left off.
Note:
A simple RET instruction would also return execution to the interrupted program, but it would
have left the interrupt control system thinking an interrupt was still in progress, making future
interrupts impossible.
Table 24.
Vector addresses
Source
Vector address
Int0
0003h
2nd USART
004Bh
Timer 0
000Bh
IC
0043h
Int1
0013h
DDC
003Bh
Timer 1
001Bh
USB
0033h
1st USART
0023h
Timer 2+EXF2
002Bh
相关PDF资料 |
PDF描述 |
|---|---|
| UPSD3334D-40U6 | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP80 |
| US1001FL | 0.5 A, 100 V, SILICON, SIGNAL DIODE |
| US1A-HE3 | 1 A, 50 V, SILICON, SIGNAL DIODE, DO-214AC |
| US1B-HE3 | 1 A, 100 V, SILICON, SIGNAL DIODE, DO-214AC |
| US1G-HE3 | 1 A, 400 V, SILICON, SIGNAL DIODE, DO-214AC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| UPSD3253B-40T6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3253B-40U1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3253B-40U1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3253B-40U6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3253B-40U6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
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