参数资料
型号: W25Q64CVSFIG
厂商: Winbond Electronics
文件页数: 23/80页
文件大小: 0K
描述: IC SPI FLASH 64MBIT 16SOIC
标准包装: 44
系列: SpiFlash®
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 64M(8M x 8)
速度: 80MHz
接口: SPI 串行
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
供应商设备封装: 16-SOIC
包装: 管件
W25Q64CV
7.2.5 Write Enable (06h)
The Write Enable instruction (Figure 4) sets the Write Enable Latch (WEL) bit in the Status Register to a
1. The WEL bit must be set prior to every Page Program, Quad Page Program, Sector Erase, Block
Erase, Chip Erase, Write Status Register and Erase/Program Security Registers instruction. The Write
Enable instruction is entered by driving /CS low, shifting the instruction code “06h” into the Data Input (DI)
pin on the rising edge of CLK, and then driving /CS high.
/CS
Mode 3
0
1
2
3
4
5
6
7
Mode 3
CLK
Mode 0
Mode 0
Instruction (06h)
DI
(IO 0 )
DO
High Impedance
(IO 1 )
Figure 4. Write Enable Instruction Sequence Diagram
7.2.6 Write Enable for Volatile Status Register (50h)
The non-volatile Status Register bits described in section 7.1 can also be written to as volatile bits. This
gives more flexibility to change the system configuration and memory protection schemes quickly without
waiting for the typical non-volatile bit write cycles or affecting the endurance of the Status Register non-
volatile bits. To write the volatile values into the Status Register bits, the Write Enable for Volatile Status
Register (50h) instruction must be issued prior to a Write Status Register (01h) instruction. Write Enable
for Volatile Status Register instruction (Figure 5) will not set the Write Enable Latch (WEL) bit, it is only
valid for the Write Status Register instruction to change the volatile Status Register bit values.
/CS
Mode 3
0
1
2
3
4
5
6
7
Mode 3
CLK
Mode 0
Mode 0
Instruction (50h)
DI
(IO 0 )
DO
High Impedance
(IO 1 )
Figure 5. Write Enable for Volatile Status Register Instruction Sequence Diagram
Publication Release Date: May 07, 2012
- 23 -
Revision F
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