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参数资料
| 型号： | W25Q64DWZPIP |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 256K X 32 SPI BUS SERIAL EEPROM, 7.5 ns, PDSO8 |
| 封装： | 6 X 5 MM, GREEN, WSON-8 |
| 文件页数： | 44/82页 |
| 文件大小： | 914K |
| 代理商： | W25Q64DWZPIP |
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W25Q64DW
Publication Release Date: January 13, 2011
- 49 -
Preliminary - Revision C
10.2.26 Erase / Program Suspend (75h)
The Erase/Program Suspend instruction “75h”, allows the system to interrupt a Sector or Block Erase
operation or a Page Program operation and then read from or program/erase data to, any other sectors
or blocks. The Erase/Program Suspend instruction sequence is shown in Figure 25a & 25b.
The Write Status Register instruction (01h) and Erase instructions (20h, 52h, D8h, C7h, 60h, 44h) are not
allowed during Erase Suspend. Erase Suspend is valid only during the Sector or Block erase operation. If
written during the Chip Erase operation, the Erase Suspend instruction is ignored. The Write Status
Register instruction (01h) and Program instructions (02h, 32h, 42h) are not allowed during Program
Suspend. Program Suspend is valid only during the Page Program or Quad Page Program operation.
The Erase/Program Suspend instruction “75h” will be accepted by the device only if the SUS bit in the
Status Register equals to 0 and the BUSY bit equals to 1 while a Sector or Block Erase or a Page
Program operation is on-going. If the SUS bit equals to 1 or the BUSY bit equals to 0, the Suspend
instruction will be ignored by the device. A maximum of time of “tSUS” (See AC Characteristics) is required
to suspend the erase or program operation. The BUSY bit in the Status Register will be cleared from 1 to
0 within “tSUS” and the SUS bit in the Status Register will be set from 0 to 1 immediately after
Erase/Program Suspend. For a previously resumed Erase/Program operation, it is also required that the
Suspend instruction “75h” is not issued earlier than a minimum of time of “tSUS” following the preceding
Resume instruction “7Ah”.
Unexpected power off during the Erase/Program suspend state will reset the device and release the
suspend state. SUS bit in the Status Register will also reset to 0. The data within the page, sector or
block that was being suspended may become corrupted. It is recommended for the user to implement
system design techniques against the accidental power interruption and preserve data integrity during
erase/program suspend state.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (75h)
High Impedance
Mode 0
Mode 3
tSUS
Accept instructions
Figure 25a. Erase/Program Suspend Instruction (SPI Mode)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W25Q64FVDAIG | 制造商:WINBOND 制造商全称:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q64FVDAIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q64FVSFIG | 功能描述:IC SPI FLASH 64MBIT 16SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:4.5M（256K x 18） 速度:133MHz 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x20） 包装:托盘 |
| W25Q64FVSFIG TR | 制造商:Winbond Electronics Corp 功能描述: 制造商:Winbond Electronics Corp 功能描述:IC FLASH 64MBIT 104MHZ 16SOIC |
| W25Q64FVSFIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
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