参数资料
型号: W25Q80BVSSIG
厂商: Winbond Electronics
文件页数: 41/75页
文件大小: 0K
描述: IC FLASH 8MBIT 8SOIC
标准包装: 90
系列: SpiFlash®
格式 - 存储器: 闪存
存储器类型: FLASH
存储容量: 8M(1M x 8)
速度: 104MHz
接口: SPI 串行
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.209",5.30mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
其它名称: Q4816329
T1015683
W25Q80BV
6.2.23
Sector Erase (20h)
The Sector Erase instruction sets all memory within a specified sector (4K-bytes) to the erased state of all
1s (FFh). A Write Enable instruction must be executed before the device will accept the Sector Erase
Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin low
and shifting the instruction code “20h” followed a 24 -bit sector address (A23-A0) (see Figure 2). The
Sector Erase instruction sequence is shown in figure 21.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not done
the Sector Erase instruction will not be executed. After /CS is driven high, the self-timed Sector Erase
instruction will commence for a time duration of t SE (See AC Characteristics). While the Sector Erase
cycle is in progress, the Read Status Register instruction may still be accessed for checking the status of
the BUSY bit. The BUSY bit is a 1 during the Sector Erase cycle and becomes a 0 when the cycle is
finished and the device is ready to accept other instructions again. After the Sector Erase cycle has
finished the Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Sector Erase
instruction will not be executed if the addressed page is protected by the Block Protect (CMP, SEC, TB,
BP2, BP1, and BP0) bits (see Status Register Memory Protection table).
/CS
Mode 3
0
1
2
3
4
5
6
7
8
9
29
30
31
Mode 3
CLK
Mode 0
Instruction (20h)
24-Bit Address
Mode 0
DI
(IO 0 )
23
*
22
2
1
0
DO
(IO 1 )
* = MSB
High Impedance
Figure 21. Sector Erase Instruction Sequence Diagram
Publication Release Date: October 09, 2013
- 41 -
Revision I
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