- 您现在的位置：买卖IC网 > PDF目录68583 > WJLXT971ALE.A4SE000 (CORTINA SYSTEMS INC) DATACOM, ETHERNET TRANSCEIVER, PQFP64 PDF资料下载
参数资料
| 型号： | WJLXT971ALE.A4SE000 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | LEAD FREE, LQFP-64 |
| 文件页数： | 32/116页 |
| 文件大小： | 1172K |
| 代理商： | WJLXT971ALE.A4SE000 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页当前第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
22
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
3.2
Network Media / Protocol Support
The LXT971A supports both 10BASE-T and 100BASE-TX Ethernet over twisted-pair, or
100 Mbps Ethernet over fiber media (100BASE-FX).
3.2.1
10/100 Network Interface
The network interface port consists of five external pins (two differential signal pairs and a signal
detect pin). The I/O pins are shared between twisted-pair (TP) and fiber. Refer to Figure 3 on page
13 for specific pin assignments.
The LXT971A output drivers generate either 100BASE-TX, 10BASE-T, or 100BASE-FX output.
When not transmitting data, the LXT971A generates 802.3-compliant link pulses or idle code.
Input signals are decoded either as a 100BASE-TX, 100BASE-FX, or 10BASE-T input, depending
on the mode selected. Auto-negotiation/parallel detection or manual control is used to determine
the speed of this interface.
3.2.1.1
Twisted-Pair Interface
The LXT971A supports either 100BASE-TX or 10BASE-T connections over 100
, Category 5,
Unshielded Twisted Pair (UTP) cable. When operating at 100 Mbps, the LXT971A continuously
transmits and receives MLT3 symbols. When not transmitting data, the LXT971A generates
“IDLE” symbols.
During 10 Mbps operation, Manchester-encoded data is exchanged. When no data is being
exchanged, the line is left in an idle state. Link pulses are transmitted periodically to keep the link
up.
Only a transformer, RJ-45 connector, load resistor, and bypass capacitors are required to complete
this interface. On the transmit side, the LXT971A has an active internal termination and does not
require external termination resistors. Intel's patented waveshaping technology shapes the outgoing
signal to help reduce the need for external EMI filters. Four slew rate settings (refer to Table 4 on
page 18) allow the designer to match the output waveform to the magnetic characteristics. On the
receive side, the internal impedance is high enough that it has no practical effect on the external
termination circuit.
3.2.1.2
Fiber Interface
The LXT971A fiber port is designed to interface with common industry-standard fiber modules. It
incorporates a Low Voltage PECL interface that complies with the ANSI X3.166 standard for
seamless integration.
Fiber mode is selected through Register bit 16.0 by the following two methods:
1. Drive the SD input to a value greater than 600 mV during power-up and reset states (all
LVPECL signaling levels from a fiber transceiver are acceptable).
2. Configure Register bit 16.0 = 1 through the MDIO interface.
相关PDF资料 |
PDF描述 |
|---|---|
| WJLXT971ALE.A4SE001 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT971ALC.A4 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT971ALE.A4 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT971ALC.A4 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| WJLXT971ALE.A4 | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| WJLXT971CA4 | 制造商:Intel 功能描述: |
| WJLXT972ALC.A4 | 功能描述:IC TRANS 3.3V ETHERNET 64-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:25 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:4.5 V ~ 5.5 V 安装类型:通孔 封装/外壳:16-DIP（0.300"，7.62mm） 供应商设备封装:16-PDIP 包装:管件 |
| WJLXT972ALC.A4 S E001 | 制造商:Intel 功能描述:PHY 1-CH 10Mbps/100Mbps 64-Pin LQFP T/R |
| WJLXT972ALC.A4-857341 | 功能描述:TXRX ETH 10/100 SGL PORT 64-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:收发器 驱动器/接收器数:1/1 规程:RS422，RS485 电源电压:4.75 V ~ 5.25 V 安装类型:通孔 封装/外壳:8-DIP（0.300"，7.62mm） 供应商设备封装:8-PDIP 包装:管件 产品目录页面:1402 (CN2011-ZH PDF) |
| WJLXT972ALC.A4-857345 | 功能描述:TXRX ETH 10/100 SGL PORT 64-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1 系列:- 类型:线路收发器 驱动器/接收器数:5/3 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC 包装:Digi-Reel® 产品目录页面:918 (CN2011-ZH PDF) 其它名称:296-25096-6 |
发布紧急采购，3分钟左右您将得到回复。