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参数资料
型号： WJLXT971ALE.A4SE000
厂商： CORTINA SYSTEMS INC
元件分类： 网络接口
英文描述： DATACOM, ETHERNET TRANSCEIVER, PQFP64
封装： LEAD FREE, LQFP-64
文件页数： 86/116页
文件大小： 1172K
代理商： WJLXT971ALE.A4SE000
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
Datasheet
71
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
6.0
Register Definitions
The LXT971A register set includes multiple 16-bit registers. Table 41 presents a complete register
listing. Table 42 is a complete memory map of all registers and Tables 43 through 58 provide
individual register definitions.
Base registers (0 through 8) are defined in accordance with the “Reconciliation Sublayer and
Media Independent Interface” and “Physical Layer Link Signaling for 10/100 Mbps Auto-
Negotiation” sections of the IEEE 802.3 standard.
Additional registers are defined in accordance with the IEEE 802.3 standard for adding unique chip
functions.
Table 41. Register Set
Address
Register Name
Bit Assignments
0
Control Register
Refer to Table 43 on page 74
1
Status Register #1
Refer to Table 44 on page 75
2
PHY Identification Register 1
Refer to Table 45 on page 76
3
PHY Identification Register 2
Refer to Table 46 on page 76
4
Auto-Negotiation Advertisement Register
Refer to Table 47 on page 77
5
Auto-Negotiation Link Partner Base Page Ability Register
Refer to Table 48 on page 78
6
Auto-Negotiation Expansion Register
Refer to Table 49 on page 79
7
Auto-Negotiation Next Page Transmit Register
Refer to Table 50 on page 79
8
Auto-Negotiation Link Partner Received Next Page Register
Refer to Table 51 on page 80
9
1000BASE-T/100BASE-T2 Control Register
Not Implemented
10
1000BASE-T/100BASE-T2 Status Register
Not Implemented
15
Extended Status Register
Not Implemented
16
Port Configuration Register
Refer to Table 52 on page 81
17
Status Register #2
Refer to Table 53 on page 82
18
Interrupt Enable Register
Refer to Table 54 on page 83
19
Interrupt Status Register
Refer to Table 55 on page 84
20
LED Configuration Register
Refer to Table 56 on page 85
21-25
Reserved
–
26
Digital Config Register
Refer to Table 57 on page 86
27-29
Reserved
–
30
Transmit Control Register
Refer to Table 58 on page 87
相关PDF资料
PDF描述
WJLXT971ALE.A4SE001 DATACOM, ETHERNET TRANSCEIVER, PQFP64
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WJLXT971ALE.A4 DATACOM, ETHERNET TRANSCEIVER, PQFP64
WJLXT971ALC.A4 DATACOM, ETHERNET TRANSCEIVER, PQFP64
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相关代理商/技术参数
参数描述
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