参数资料
型号: XA3S400A-4FGG400Q
厂商: Xilinx Inc
文件页数: 8/57页
文件大小: 0K
描述: IC FPGA SPARTAN-3A 400K 400-FBGA
产品培训模块: Extended Spartan 3A FPGA Family
标准包装: 1
系列: Spartan®-3A XA
LAB/CLB数: 896
逻辑元件/单元数: 8064
RAM 位总计: 368640
输入/输出数: 311
门数: 400000
电源电压: 1.14 V ~ 1.26 V
安装类型: 表面贴装
工作温度: -40°C ~ 125°C
封装/外壳: 400-BGA
供应商设备封装: 400-FBGA(21x21)
XA Spartan-3A Automotive FPGA Family Data Sheet
DS681 (v2.0) April 22, 2011
Product Specification
16
External Termination Requirements for Differential I/O
LVDS, RSDS, MINI_LVDS, and PPDS I/O Standards
BLVDS_25 I/O Standard
TMDS_33 I/O Standard
X-Ref Target - Figure 6
Figure 6: External Input Termination for LVDS, RSDS, MINI_LVDS, and PPDS I/O Standards
X-Ref Target - Figure 7
Figure 7: External Termination Resistors for BLVDS_25 I/O Standard
X-Ref Target - Figure 8
Figure 8: External Input Resistors Required for TMDS_33 I/O Standard
Z0 = 50
Ω
Z0 = 50
Ω
100
Ω
DS681_05_041111
a) Input-only differential pairs or pairs not using DIFF_TERM=Yes constraint
Z0 = 50
Ω
Z0 = 50
Ω
b) Differential pairs using DIFF_TERM=Yes constraint
DIFF_TERM=No
DIFF_TERM=Yes
LVDS_33,
MINI_LVDS_33,
RSDS_33,
PPDS_33
LVDS_33, LVDS_25,
MINI_LVDS_33,
MINI_LVDS_25,
RSDS_33, RSDS_25,
PPDS_33, PPDS_25
CAT16-PT4F4
Part Number
/ th of Bourns
14
VCCO = 3.3V
LVDS_25,
MINI_LVDS_25,
RSDS_25,
PPDS_25
VCCO = 2.5V
LVDS_33,
MINI_LVDS_33,
RSDS_33,
PPDS_33
VCCO = 3.3V
LVDS_25,
MINI_LVDS_25,
RSDS_25,
PPDS_25
VCCO = 2.5V
No VCCO Restrictions
R
LVDS_33,
MINI_LVDS_33,
RSDS_33,
PPDS_33
VCCO = 3.3V
LVDS_25,
MINI_LVDS_25,
RSDS_25,
PPDS_25
VCCO = 2.5V
DT
Bank 0
Bank 2
Bank 0
Bank 2
B
a
nk
3
B
a
nk
1
Bank 0 and 2
Any Bank
Z0 = 50
Ω
Z0 = 50
Ω
140
Ω
165
Ω
165
Ω
100
Ω
VCCO = 2.5V
No VCCO Requirement
DS681_06_041111
BLVDS_25
CAT16-LV4F12
Part Number
/ th of Bourns
14
CAT16-PT4F4
Part Number
/ th of Bourns
14
Bank 0
Bank 2
B
a
nk
3
B
a
nk
1
Any Bank
Bank 0
Bank 2
B
a
nk
3
B
a
nk
1
Any Bank
50
Ω
VCCO = 3.3V
VCCAUX = 3.3V
DS681_07_041111
DVI/HDMI cable
50
Ω
3.3V
TMDS_33
Bank 0
Bank 2
Bank 0 and 2
Bank 0
Bank 2
B
a
nk
3
B
a
nk
1
Any Bank
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