参数资料
| 型号： | XC2S400E-6FGG456C |
| 厂商： | Xilinx Inc |
| 文件页数： | 14/108页 |
| 文件大小： | 0K |
| 描述： | IC SPARTAN-IIE FPGA 400K 456FBGA |
| 产品变化通告： | FPGA Family Discontinuation 18/Apr/2011 |
| 标准包装： | 60 |
| 系列： | Spartan®-IIE |
| LAB/CLB数： | 2400 |
| 逻辑元件/单元数： | 10800 |
| RAM 位总计： | 163840 |
| 输入/输出数： | 329 |
| 门数： | 400000 |
| 电源电压： | 1.71 V ~ 1.89 V |
| 安装类型： | 表面贴装 |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 456-BBGA |
| 供应商设备封装： | 456-FBGA |
| 其它名称： | 122-1327 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页当前第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页
DS077-2 (v3.0) August 9, 2013
13
Product Specification
Spartan-IIE FPGA Family: Functional Description
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
Configurable Logic Block
The basic building block of the Spartan-IIE FPGA CLB is the
logic cell (LC). An LC includes a 4-input function generator,
carry logic, and storage element. The output from the func-
tion generator in each LC drives the CLB output or the
D input of the flip-flop. Each Spartan-IIE FPGA CLB con-
tains four LCs, organized in two similar slices; a single slice
is shown in Figure 6.
In addition to the four basic LCs, the Spartan-IIE FPGA CLB
contains logic that combines function generators to provide
functions of five or six inputs.
Look-Up Tables
Spartan-IIE FPGA function generators are implemented as
4-input look-up tables (LUTs). In addition to operating as a
function generator, each LUT can provide a 16 x 1-bit syn-
chronous RAM. Furthermore, the two LUTs within a slice
can be combined to create a 16 x 2-bit or 32 x 1-bit syn-
chronous RAM, or a 16 x 1-bit dual-port synchronous RAM.
The Spartan-IIE FPGA LUT can also provide a 16-bit shift
register that is ideal for capturing high-speed or burst-mode
data. This mode can also be used to store data in applica-
tions such as Digital Signal Processing.
Storage Elements
Storage elements in the Spartan-IIE FPGA slice can be
configured either as edge-triggered D-type flip-flops or as
level-sensitive latches. The D inputs can be driven either by
function generators within the slice or directly from slice
inputs, bypassing the function generators.
In addition to Clock and Clock Enable signals, each slice
has synchronous set and reset signals (SR and BY). SR
forces a storage element into the initialization state speci-
fied for it in the configuration. BY forces it into the opposite
state. Alternatively, these signals may be configured to
operate asynchronously.
All control signals are independently invertible, and are
shared by the two flip-flops within the slice.
相关PDF资料 |
PDF描述 |
|---|---|
| XA6SLX100-2FGG484I | IC FPGA SPARTAN 6 484FGGBGA |
| 25LC640T-E/SN | IC EEPROM 64KBIT 2MHZ 8SOIC |
| SST25VF020B-80-4C-SAE-T | IC FLASH SER 2MB 80MHZ SPI 8SOIC |
| XC6SLX100-N3FGG484I | IC FPGA SPARTAN-6 484FPGA |
| SST25LF020A-33-4C-SAE | IC FLASH SER 2MB 33HZ SPI 8SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XC2S400E-6FGG456I | 制造商:Xilinx 功能描述:FPGA SPARTAN-IIE 400K GATES 10800 CELLS 357MHZ 1.8V 456FBGA - Trays |
| XC2S400E-6FGG676C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan-IIE FPGA |
| XC2S400E-6FGG676I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan-IIE FPGA |
| XC2S400E-6FT256C | 功能描述:IC SPARTAN-IIE FPGA 400K 256FTBG RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan®-IIE 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA，FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC2S400E-6FT256I | 制造商:Xilinx 功能描述:FPGA SPARTAN-IIE 400K GATES 10800 CELLS 357MHZ 1.8V 256FTBGA - Trays |
发布紧急采购，3分钟左右您将得到回复。