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| 型号： | ZL2004EVK1 |
| 厂商： | Intersil |
| 文件页数： | 17/42页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL FOR ZL2004 |
| 标准包装： | 1 |
| 系列： | * |
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ZL2004
5.6 Switching Frequency and PLL
The ZL2004 incorporates an internal phase-locked
loop (PLL) to clock the internal circuitry. The PLL can
be driven by an external clock source connected to the
SYNC pin. When using the internal oscillator, the
SYNC pin can be configured as a clock source for
other Zilker Labs devices.
The SYNC pin is a unique pin that can perform
multiple functions depending on how it is configured.
The CFG pin is used to select the operating mode of
illustrates the typical connections for each mode.
Table 12. SYNC Pin Function Selection
The incoming clock signal must be in the range of 200
kHz to 1.4 MHz and must be stable when the enable
pin is asserted. The clock signal must also exhibit the
necessary performance requirements (see Table 3). In
the event of a loss of the external clock signal, the
output voltage may show transient over/undershoot.
If this happens, the ZL2004 will automatically switch
to its internal oscillator and switch at a frequency close
to the previous incoming frequency.
Configuration C: SYNC AUTO DETECT
When the SYNC pin is configured in auto detect mode
(CFG pin is left OPEN), the device will automatically
check for a clock signal on the SYNC pin after enable
CFG Pin
LOW
OPEN
HIGH
SYNC Pin Function
SYNC is configured as an input
Auto Detect mode
SYNC is configured as an output
f SW = 400 kHz
is asserted.
If a clock signal is present, The ZL2004 ’s oscillator
will then synchronize the rising edge of the external
clock. Refer to SYNC INPUT description.
If no incoming clock signal is present, the ZL2004 will
configure the switching frequency according to the
Configuration A: SYNC OUTPUT
When the SYNC pin is configured as an output (CFG
pin is tied HIGH), the device will run from its internal
oscillator and will drive the resulting internal oscillator
signal (preset to 400 kHz) onto the SYNC pin so other
devices can be synchronized to it. The SYNC pin will
not be checked for an incoming clock signal while in
this mode.
state of the SYNC pin as listed in Table 13. In this
mode, the ZL2004 will only read the SYNC pin
connection during the start-up sequence. Changes to
SYNC pin connections will not affect f SW until the
power (VDD) is cycled off and on.
Table 13. Switching Frequency Selection
SYNC Pin Frequency
Configuration B: SYNC INPUT
When the SYNC pin is configured as an input (CFG
pin is tied LOW), the device will automatically check
for a clock signal on the SYNC pin each time EN is
LOW
OPEN
HIGH
Resistor
200 kHz
400 kHz
1 MHz
asserted.
The
ZL2004 ’s oscillator
will then
If the user wishes to run the ZL2004 at a frequency not
synchronize with the rising edge of the external clock.
17
listed in Table 13, the switching frequency can be set
using an external resistor, R SYNC , connected between
FN6846.3
February 15, 2011
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL2005 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital-DC? Integrated Power Management and Conversion IC |
| ZL2005ALNF | 制造商:Intersil Corporation 功能描述:DIGITAL DC-DC CONTROLLER W/ DRIVERS - TRAY100 - Trays 制造商:Intersil Corporation 功能描述:IC REG CNTRLR BUCK PWM 36-QFN 制造商:Intersil Corporation 功能描述:Digital DC-DC Controller w/ Drivers - BULK 50 |
| ZL2005ALNFT | 功能描述:电压模式 PWM 控制器 DIGTL DC-DC CNTRLR W/DRVRS TR100 RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ZL2005ALNFT1 | 功能描述:电压模式 PWM 控制器 DIGTL DC-DC CNTRLR W/DRVRS TR1K RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ZL2005P | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital-DC? Controller with Drivers and POLA/DOSA Trim |
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