- 您现在的位置：买卖IC网 > PDF目录20664 > ZL2004EVK1 (Intersil)KIT EVAL FOR ZL2004 PDF资料下载
参数资料
| 型号： | ZL2004EVK1 |
| 厂商： | Intersil |
| 文件页数： | 26/42页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL FOR ZL2004 |
| 标准包装： | 1 |
| 系列： | * |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页当前第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页
ZL2004
When a load current step function imposed on the
5.11 Non-linear Response (NLR) Settings
The ZL2004 incorporates a non-linear response (NLR)
loop that decreases the response time and the output
voltage deviation in the event of a sudden output load
current step. The NLR loop incorporates a secondary
error signal processing path that bypasses the primary
error loop when the output begins to transition outside
of the standard regulation limits. This scheme results in
a higher equivalent loop bandwidth than what is
possible using a traditional linear loop.
Table 19. Pin-strap Settings for Loop Compensation
output causes the output voltage to drop below the
lower regulation limit, the NLR circuitry will force a
positive correction signal that will turn on the upper
MOSFET and quickly force the output to increase.
Conversely, a negative load step (i.e. removing a large
load current) will cause the NLR circuitry to force a
negative correction signal that will turn on the lower
MOSFET and quickly force the output to decrease. The
ZL2004 has been pre-configured with appropriate NLR
settings that correspond to the loop compensation
NLR
Off
On
f n Range
f sw /60 < f n < f sw /30
f sw /120 < f n < f sw /60
f sw /240 < f n < f sw /120
f sw /60 < f n < f sw /30
f sw /120 < f n < f sw /60
f sw /240 < f n < f sw /120
f zesr Range
f zesr > f sw /10
f sw /10 > f zesr > f sw /30
f sw /30 > f zesr > f sw /60
f zesr > f sw /10
f sw /10 > f zesr > f sw /30
f sw /30 > f zesr > f sw /60
f zesr > f sw /10
f sw /10 > f zesr > f sw /30
f sw /30 > f zesr > f sw /60
f zesr > f sw /10
f sw /10 > f zesr > f sw /30
f sw /30 > f zesr > f sw /60
f zesr > f sw /10
f sw /10 > f zesr > f sw /30
f sw /30 > f zesr > f sw /60
f zesr > f sw /10
f sw /10 > f zesr > f sw /30
f sw /30 > f zesr > f sw /60
FC Pin
10 k?
11 k?
12.1 k?
13.3 k?
14.7 k?
16.2 k?
17.8 k?
19.6 k?
21.5 k?
23.7 k?
26.1 k?
28.7 k?
31.6 k?
34.8 k?
38.3 k?
42.2 k?
46.4 k?
51.1 k?
5.12 Efficiency Optimized Driver Dead-time Control
The ZL2004 utilizes a closed loop algorithm to
optimize the dead-time applied between the gate drive
signals for the top and bottom FETs. In a synchronous
It is therefore advantageous to minimize this dead-time
to provide optimum circuit efficiency. In the first order
model of a buck converter, the duty cycle is
determined by the equation:
buck converter, the MOSFET drive circuitry must be
designed such that the top and bottom MOSFETs are
never in the conducting state at the same time.
D
V OUT
V IN
Potentially damaging currents flow in the circuit if
both top and bottom MOSFETs are simultaneously on
for periods of time exceeding a few nanoseconds.
Conversely, long periods of time in which both
MOSFETs are off reduce overall circuit efficiency by
allowing current to flow in their parasitic body diodes.
26
However, non-idealities exist that cause the real duty
cycle to extend beyond the ideal. Dead-time is one of
those non-idealities that can be manipulated to improve
efficiency. The ZL2004 has an internal algorithm that
constantly adjusts dead-time non-overlap to minimize
duty cycle, thus maximizing efficiency.
FN6846.3
February 15, 2011
相关PDF资料 |
PDF描述 |
|---|---|
| TTN0.63SV | 5/8" THERMASHIELD TUBE SLV 250' |
| TC1304-ZA0EMF | IC REG DL BUCK/LINEAR SYNC 10DFN |
| ESC10DRTH | CONN EDGECARD 20POS DIP .100 SLD |
| ISL6425EVAL2 | EVAL BOARD 2 FOR ISL6425 |
| ISL59532IK-EVAL | EVAL BOARD FOR ISL59532 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL2005 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital-DC? Integrated Power Management and Conversion IC |
| ZL2005ALNF | 制造商:Intersil Corporation 功能描述:DIGITAL DC-DC CONTROLLER W/ DRIVERS - TRAY100 - Trays 制造商:Intersil Corporation 功能描述:IC REG CNTRLR BUCK PWM 36-QFN 制造商:Intersil Corporation 功能描述:Digital DC-DC Controller w/ Drivers - BULK 50 |
| ZL2005ALNFT | 功能描述:电压模式 PWM 控制器 DIGTL DC-DC CNTRLR W/DRVRS TR100 RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ZL2005ALNFT1 | 功能描述:电压模式 PWM 控制器 DIGTL DC-DC CNTRLR W/DRVRS TR1K RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel |
| ZL2005P | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital-DC? Controller with Drivers and POLA/DOSA Trim |
发布紧急采购，3分钟左右您将得到回复。