参数资料
型号: ZL30108LDG1
厂商: XILINX INC
元件分类: 数字传输电路
英文描述: ATM/SONET/SDH SUPPORT CIRCUIT, QCC32
封装: 5 X 5 MM, 0.90 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, MO-220, QFN-32
文件页数: 16/57页
文件大小: 691K
代理商: ZL30108LDG1
ZL30108
Data Sheet
23
Zarlink Semiconductor Inc.
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
* Period Min/Max values are the limits to avoid a single-cycle fault detection. Short-term and long-term average periods must be within Out-of-
Range limits.
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
AC Electrical Characteristics* - Input timing for REF0 and REF1 references (see Figure 14).
Characteristics
Symbol
Min.
Typ.
Max.
Units
1
2 kHz reference period
tREF2kP
483
500
516
μs
2
8 kHz reference period
tREF8kP
120
125
128
μs
3
1.544 MHz reference period
tREF1.5P
338
648
950
ns
4
2.048 MHz reference period
tREF2P
263
488
712
ns
5
8.192 MHz reference period
tREF8P
63
122
175
ns
6
16.384 MHz reference period
tREF16P
38
61
75
ns
7
19.44 MHz reference period
tREF8kP
38
51
75
ns
8
reference pulse width high or low
tREFW
15
ns
AC Electrical Characteristics* - Input to output timing for REF0 and REF1 references (see Figure 14).
Characteristics
Symbol
Min.
Max.
Units
1
2 kHz reference input to F2ko delay
tREF2kD
01.2
ns
2
2 kHz reference input to F8ko delay
tREF2k_F8kD
-27.2
-26.5
ns
3
8 kHz reference input to F8ko delay
tREF8kD
-0.3
2
ns
4
1.544 MHz reference input to F8ko delay
tREF1.5_F8kD
-1.1
0.9
ns
5
2.048 MHz reference input to F8ko delay
tREF2_F8kD
-1.1
0.9
ns
6
8.192 MHz reference input to F8ko delay
tREF8_F8kD
-0.6
0.8
ns
7
16.384 MHz reference input to F8ko delay
tREF16_F8kD
29.0
30.6
ns
8
19.44 MHz reference input to C19o delay
tREF19D
0.2
1.1
ns
9
19.44 MHz reference input to F8ko delay
tREF19_F8kD
-1.7
1
ns
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