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参数资料
| 型号： | ZPSD813F3V-20J |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| 封装： | PLASTIC, LDCC-52 |
| 文件页数： | 52/132页 |
| 文件大小： | 513K |
| 代理商： | ZPSD813F3V-20J |
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PSD813F Family
Preliminary
22
9.1.1.6 Writing to the Optional EEPROM
Data may be written a byte at a time to the EEPROM using simple write operations, much
like writing to an SRAM. Unlike SRAM though, the completion of each byte write must be
checked before the next byte is written. To speed up this process, the PSD813F offers a
Page write feature to allow writing of several bytes before checking status.
To prevent inadvertent writes to EEPROM, the PSD813F offers a Software Data Protect
(SDP) mode. Once enabled, SDP forces the MCU to “unlock” the EEPROM before altering
its contents, much like Flash memory programming.
9.1.1.6.1 Write a Byte to EEPROM
A write operation is initiated when an EEPROM select signal (EESi) is true and the write
strobe signal (wr) into the PSD813F is true. If the PSD813F detects no additional writes
within 120 sec, an internal storage operation is initiated. Internal storage to EEPROM
memory technology typically takes a few milliseconds to complete.
The status of the write operation is obtained by the MCU reading the Data Polling or Toggle
bits (as detailed in section 9.1.1.5), or the Ready/Busy output pin (section 9.1.1.2).
Keep in mind that the MCU does not need to erase a location in EEPROM before writing it.
Erasure is performed automatically as an internal process.
9.1.1.6.2 Write a Page to EEPROM
Writing data to EEPROM using page mode is more efficient than writing one byte at a
time. The PSD813F EEPROM has a 64 byte volatile buffer that the MCU may fill before an
internal EEPROM storage operation is initiated. Page mode timing approaches a 64:1
advantage over the time it takes to write individual bytes.
To invoke page mode, the MCU must write to EEPROM locations within a single page, with
no more than 120 sec between individual byte writes. A single page means that address
lines A14 to A6 must remain constant. The MCU may write to the 64 locations on a page in
any order, which is determined by address lines A5 to A0. As soon as 120 sec have
expired after the last page write, the internal EEPROM storage process begins and the
MCU checks programming status. Status is checked the same way it is for byte writes,
described above.
Note: be aware that if the upper address bits (A14 to A6) change during page write
operations, loss of data may occur. Ensure that all bytes for a given page have
been successfully stored in the EEPROM before proceeding to the next page. Correct
management of MCU interrupts during EEPROM page write operations is essential.
9.1.1.6.3 EEPROM Software Data Protect (SDP)
The SDP feature is useful for protecting the contents of EEPROM from inadvertent write
cycles that may occur during uncontrolled MCU bus conditions. These may happen if the
application software gets lost or when VCC is not within normal operating range.
Instructions from the MCU are used to enable and disable SDP mode (see Table 9). Once
enabled, the MCU must write an instruction sequence to EEPROM before writing data
(much like writing to Flash memory). SDP mode can be used for both byte and page writes
to EEPROM. The device will remain in SDP mode until the MCU issues a valid SDP disable
instruction.
PSD813F devices are shipped with SDP mode disabled. However, within PSDsoft, SDP
mode may be enabled as part of programming the device with a device programmer
(PSDpro).
The
PSD813F
Functional
Blocks
(cont.)
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