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参数资料
| 型号： | 935263912557 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 1 MM HEIGHT, PLASTIC, SOT-386-1, TQFP-100 |
| 文件页数： | 12/56页 |
| 文件大小： | 277K |
| 代理商： | 935263912557 |
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Philips Semiconductors
Preliminary specification
PDI1394L21
1394 full duplex AV link layer controller
2
2000 Jun 06
1.0
FEATURES
IEEE 1394–1995 Standard Link Layer Controller
Hardware Support for the IEC61883 International Standard of
Digital Interface for Consumer Electronics
Interface to any IEEE 1394–1995 Physical Layer Interface
5V Tolerant I/Os
Single 3.3V supply voltage
Full-duplex isochronous operation
Operates with 400/200/100 Mbps physical layer devices
Dual 4K Byte FIFOs for isochronous data
Supports single capacitor isolation mode and IEEE 1394–1995,
Annex J. isolation
4-field deep SYT buffer added to enhance real-time isochronous
synchronization using the AVFSYNC pin
Generates its own AV port clocks under software control. Select
one of three frequencies: 24.576, 12.288, or 6.144 MHz
2.0
DESCRIPTION
The PDI1394L21, Philips Semiconductors Full Duplex 1394
Audio/Video (AV) Link Layer Controller, is an IEEE 1394–1995
compliant link layer controller featuring 2 embedded AV layer
interfaces. The AV layers are designed to pack and un-pack
application data packets for transmission over the IEEE 1394 bus
using isochronous data transfers. Because of its full duplex
architecture, the PDI1394L21 is capable of receiving and
transmitting isochronous data during the same bus cycle. Two 8 bit
AV ports, each with its own buffer (FIFO), receive and output
isochronous data for transmission and reception of bus packets.
Each port can be configured to receive or transmit, however, the
other port always performs the opposite function. Half duplex
operation is also permitted.
The application data is packetized according to the IEC 61883
International Standard of Interface for Consumer Electronic
Audio/Video Equipment. Both AV layer interfaces are byte-wide
ports capable of accommodating various MPEG–2 and DVC
codecs. An 80C51 compatible byte-wide host interface is provided
for internal register configuration as well as performing
asynchronous data transfers.
The PDI1394L21 is powered by a single 3.3V power supply and the
inputs and outputs are 5V tolerant. It is available in the LQFP100
and TQFP100 packages.
3.0
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
VDD
Functional supply voltage range
3.0
3.3
3.6
V
IDD
Supply current @ VDD = 3.3V
Operating
75
mA
SCLK
Device clock
49.147
49.152
49.157
MHz
4.0
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
100-pin plastic LQFP100
0
°C to +70°C
PDI1394L21BE
SOT407 AB15
100-pin plastic TQFP100
0
°C to +70°C
PDI1394L21BP
SOT386 BB2
NOTE:
This datasheet is subject to change.
Please visit out internet website www.semiconductors.philips.com/1394 for latest changes.
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