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| 型号： | AD6634 |
| 厂商： | Analog Devices, Inc. |
| 元件分类： | 基带处理器 |
| 英文描述： | 80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP) |
| 中文描述： | 80 MSPS的双通道的WCDMA接收信号处理器（RSP） |
| 文件页数： | 30/52页 |
| 文件大小： | 925K |
| 代理商： | AD6634 |
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REV. 0
–30–
AD6634
operation. The rms samples so obtained are subtracted from the
request signal level, R, specified in registers (0x0B, 0x14), leaving
an error term to be processed by the loop filter, G(z).
The user sets this programmable request signal level, R, according
to the output signal level desired. The request signal level, R,
is programmable from –0 dB to –23.99 dB in steps of 0.094 dB.
The request signal level should also compensate for error, if any,
due to the CIC scaling as explained previously. Therefore, the
request signal level is offset by the amount of error induced in
CIC, given by,
(
20
10
log
where the offset is in dB. Continuing with the previous example
this offset is given by,
Offset
= 72.24 – 69.54 = 2.7 dB. The
request signal level is given by,
(
where
R
is the request signal level and
DSL
(Desired Signal Level)
is the output signal level that the user desires. In the previous
example if the desired signal level is –13.8 dB, the request level,
R
, is programmed to be –16.54 dB.
The AGC provides a programmable second order loop filter. The
programmable parameters gain, K, and pole, P, completely define
the loop filter characteristics. The error term after subtracting
the request signal level is processed by the loop filter, G(z). The
open loop poles of the second order loop filter are ‘1’ and, P,
respectively. The loop filter parameters, pole, P, and gain, K,
allow adjustment of the filter time constant that determines the
window for calculating the peak-to-average ratio.
The open loop transfer function for the filter including the gain
parameter is given below.
Offset
M
N
S
CIC
AVG
CIC
=
×
×
)
×
6 02
.
–
R
ceil
DSL
offset
=
)
×
–
.
.
0 094
0 094
G z
Kz
P z
Pz
=
+
(
+
–
–
–
–
1
1
2
1
1
If the AGC is properly configured (in terms of offset in request
level), there are no gains except the filter gain
K
. Under these
circumstances, a closed loop expression for the AGC loop is
possible and is given by,
+
1
G
z
G z
G z
Kz
K
P z
Pz
CLOSED
( )
=
=
+
(
+
1
1
1
1
2
–
–
–
– –
The gain parameter
K
and pole
P
are programmable through regis-
ters (0x0E and 0x0F, respectively, for AGC channel A and B) from
0 to 0.996 in steps of 0.0039 using 8-bit representation. Though
the user defines the open loop pole
P
and gain
K
, they will directly
impact the placement of the closed loop poles and filter character-
istics. These closed loop poles P
1
, P
2
, are the roots of the denominator
of the above closed loop transfer function and are given by,
P P
,
P
K
P
K
P
2
2
1
(
1
2
4
–
–
–
=
+
)
+
+
(
)
Typically, the AGC loop performance is defined in terms of its time
constant or settling time. In such a case the closed loop poles
should be set to meet the time constants required by the AGC
loop. The following relation between time constant and closed loop
poles can be used for this purpose.
P
M
SAMPLE RATE
CIC
1 2
,
1 2
,
τ
=
×
exp
where
τ
P
1, 2
. The time constants can also be derived from settling times
as given below,
are the time constants corresponding to the poles
2
4
5
3
%
%
Setting Time
or
Setting Time
M
CIC
(CIC decimation is from 1 to 4096), and either the settling
time or time constant should be chosen by the user. The sample
rate is the combined sample rate of all the interleaved channels
coming into the AGC/half-band interpolated filters. If two chan-
nels are being used to process one carrier of UMTS at 2 chip
rate, each channel works at 3.84 MHz and the combined sample
rate coming into the half-band interpolated filters is 7.68 MSPS.
This rate should be used in the calculation of poles in the above
equation, if half-band interpolating filters are bypassed.
The loop filter output corresponds to the signal gain that is
updated by the AGC. Since all computation in the loop filter is
done in logarithmic domain (to the base 2) of the samples, the
signal gain is generated using the exponent (power of 2) of the
loop filter output.
The gain multiplier gives the product of the signal gain with
both the I and Q data entering the AGC section. This signal
gain is applied as a coarse 4-bit scaling and then a fine scale
8-bit multiplier. Thus the applied signal gain is between
0 dB and 96.296 dB in steps of 0.024 dB. Initial value for signal
gain is programmable using the registers 0x0D and 0x15 for
AGC A and AGC B, respectively.
The products of the gain multiplier, the AGC scaled outputs,
have 19-bit representation. These are in turn used as I and Q
for calculating the power and AGC error and loop filtered to
produce signal gain for next set of samples. These AGC scaled
outputs can be programmed to have 4, 5, 6, 7, 8, 10, 12, or
16-bit widths using the AGC control word (0x0A, 0x12). The
AGC scaled outputs are truncated to required bit widths using
the clipping circuitry as shown in the block diagram.
Open Loop Gain Setting
If filter gain K occupies only one LSB, or 0.0039, during the
multiplication with error term, errors of up to 6.02 dB could be
truncated. This truncation is due to the lower bit widths avail-
able in the AGC loop. If filter gain K were the maximum value,
truncated errors would be a less than 0.094 dB (equivalent to
1 LSB of error term representation). Generally, a small filter
gain is used to achieve a large time constant loop (or slow loops),
but in this case it would cause large errors to go undetected.
Due to this peculiarity, the designers recommend that if a user
wants slow AGC loops that they use fairly high values for filter
gain K and then use CIC decimation to achieve a slow loop. In
this way, the AGC loop will make large infrequent gain changes
compared to small and frequent gain changes as in the case of
normal small gain loop filter. However, though the AGC loop
makes large infrequent gain changes, a slow time constant is still
achieved and there is lesser truncation of errors.
Average Samples Setting
Though it is complicated to express the exact effect of the num-
ber of averaging samples, thinking intuitively it has a smoothing
effect on the way the AGC loop attacks a sudden increase or a
相关PDF资料 |
PDF描述 |
|---|---|
| AD6634BBC | 80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP) |
| AD6634PCB | 80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP) |
| AD6635 | 4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
| AD6635BB | 4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
| AD6636 | 150 MSPS Wideband Digital Down-Converter (DDC) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD6634BBC | 功能描述:IC RSP 80MSPS DUAL 196-CSPBGA RoHS:否 类别:RF/IF 和 RFID >> RF 混频器 系列:AD6634 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:100 系列:- RF 型:W-CDMA 频率:2.11GHz ~ 2.17GHz 混频器数目:1 增益:17dB 噪音数据:2.2dB 次要属性:- 电流 - 电源:11.7mA 电源电压:2.7 V ~ 3.3 V 包装:托盘 封装/外壳:12-VFQFN 裸露焊盘 供应商设备封装:12-QFN-EP（3x3） |
| AD6634BBCZ | 功能描述:IC RSP 80MSPS DUAL 196CSPBGA RoHS:是 类别:RF/IF 和 RFID >> RF 混频器 系列:AD6634 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:100 系列:- RF 型:W-CDMA 频率:2.11GHz ~ 2.17GHz 混频器数目:1 增益:17dB 噪音数据:2.2dB 次要属性:- 电流 - 电源:11.7mA 电源电压:2.7 V ~ 3.3 V 包装:托盘 封装/外壳:12-VFQFN 裸露焊盘 供应商设备封装:12-QFN-EP（3x3） |
| AD6634BC/PCB | 制造商:Analog Devices 功能描述:WCDMA RECEIVE SGNL PROCESSOR - Bulk |
| AD6634PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:80 MSPS, Dual-Channel WCDMA Receive Signal Processor (RSP) |
| AD6635 | 制造商:AD 制造商全称:Analog Devices 功能描述:4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
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