参数资料
型号: AD9517-3ABCPZ
厂商: Analog Devices Inc
文件页数: 63/80页
文件大小: 0K
描述: IC CLOCK GEN 2.0GHZ VCO 48LFCSP
标准包装: 1
类型: 时钟发生器,扇出配送
PLL:
输入: CMOS,LVDS,LVPECL
输出: CMOS,LVDS,LVPECL
电路数: 1
比率 - 输入:输出: 1:12
差分 - 输入:输出: 是/是
频率 - 最大: 2.25GHz
除法器/乘法器: 是/无
电源电压: 3.135 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-VFQFN 裸露焊盘,CSP
供应商设备封装: 48-LFCSP-VQ(7x7)
包装: 托盘
AD9517-3
Data Sheet
Rev. E | Page 66 of 80
Table 55. Fine Delay Adjust—OUT4 to OUT7
Reg.
Addr.
(Hex)
Bits
Name
Description
0x0A0
0
OUT4 delay bypass
Bypasses or uses the delay function.
0: uses delay function.
1: bypasses delay function (default).
0x0A1
[5:3]
OUT4 ramp capacitors
Selects the number of ramp capacitors used by the delay function. The combination of the
number of the capacitors and the ramp current sets the delay full scale.
5
4
3
Number of Capacitors
0
4 (default)
0
1
3
0
1
0
3
0
1
2
1
0
3
1
0
1
2
1
0
2
1
[2:0]
OUT4 ramp current
Ramp current for the delay function. The combination of the number of capacitors and the ramp
current sets the delay full scale.
2
1
0
Current (A)
0
200 (default)
0
1
400
0
1
0
600
0
1
800
1
0
1000
1
0
1
1200
1
0
1400
1
1600
0x0A2
[5:0]
OUT4 delay fraction
Selects the fraction of the full-scale delay desired (6-bit binary).
A setting of 000000b gives zero delay.
Only delay values up to 47 decimals (101111b; 0x2F) are supported (default = 0x00).
0x0A3
0
OUT5 delay bypass
Bypasses or uses the delay function.
0: uses delay function.
1: bypasses delay function (default).
0x0A4
[5:3]
OUT5 ramp capacitors
Selects the number of ramp capacitors used by the delay function. The combination of the
number of the capacitors and the ramp current sets the delay full scale.
5
4
3
Number of Capacitors
0
4 (default)
0
1
3
0
1
0
3
0
1
2
1
0
3
1
0
1
2
1
0
2
1
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