参数资料
型号: AD9600ABCPZ-105
厂商: Analog Devices Inc
文件页数: 18/72页
文件大小: 0K
描述: IC ADC 10BIT 105MSPS 64LFCSP
标准包装: 1
位数: 10
采样率(每秒): 105M
数据接口: 串行,SPI?
转换器数目: 2
功率耗散(最大): 650mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-VFQFN 裸露焊盘,CSP
供应商设备封装: 64-LFCSP-VQ(9x9)
包装: 托盘
输入数目和类型: 4 个单端,单极;2 个差分,单极
AD9600
Rev. B | Page 25 of 72
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9600.
The input range can be adjusted by varying the reference voltage
applied to the AD9600, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in this section. The Reference
Decoupling section describes the best PCB layout practices
for the reference.
Internal Reference Connection
A comparator within the AD9600 detects the potential at the
SENSE pin and configures the reference into four possible modes,
which are summarized in Table 11. If SENSE is grounded, the
reference amplifier switch is connected to the internal resistor
divider (see Figure 51), setting VREF to 1.0 V. Connecting the
SENSE pin to VREF switches the reference amplifier output to
the SENSE pin, completing the loop and providing a 0.5 V
reference output. If a resistor divider is connected external to
the chip as shown in Figure 52, the switch again selects the
SENSE pin. This puts the reference amplifier in a noninverting
mode with the VREF output defined as
+
×
=
R1
R2
VREF
1
5
.
0
The input range of the ADC always equals twice the voltage at
the reference pin for either an internal or an external reference.
VREF
SENSE
0.5V
AD9600
SELECT
LOGIC
0.1F
1F
VIN – A/VIN – B
VIN + A/VIN + B
ADC
CORE
06
90
9-
01
9
Figure 51. Internal Reference Configuration
SENSE
VREF
0.5V
AD9600
SELECT
LOGIC
0.1F
1F
VIN – A/VIN – B
VIN + A/VIN + B
ADC
CORE
R2
R1
06
909
-02
0
Figure 52. Programmable Reference Configuration
If the internal reference of the AD9600 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 53 depicts
how the internal reference voltage is affected by loading.
0
–1.25
02.0
LOAD CURRENT (mA)
R
E
F
E
RE
NCE
V
O
L
T
AG
E
RRO
R
(
%
)
–0.25
–0.50
–0.75
–1.00
0.5
1.0
1.5
VREF = 0.5V
VREF = 1.0V
0
69
09
-2
80
Figure 53. VREF Accuracy vs. Load
Table 11. Reference Configuration Summary
Selected Mode
SENSE Voltage
Resulting VREF (V)
Resulting Differential Span (V p-p)
External Reference
AVDD
N/A
2 × external reference
Internal Fixed Reference
VREF
0.5
1.0
Programmable Reference
0.2 V to VREF
+
×
R1
R2
1
5
.
0
2 × VREF
Internal Fixed Reference
AGND to 0.2 V
1.0
2.0
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