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参数资料
| 型号： | AD9895KBCZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 46/58页 |
| 文件大小： | 0K |
| 描述： | IC CCD SIGNAL PROC/GEN 64-CSPBGA |
| 标准包装： | 2,000 |
| 类型： | CCD 信号处理器，12 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFBGA，CSPBGA |
| 供应商设备封装： | 64-CSPBGA（9x9） |
| 包装： | 带卷 (TR) |
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REV. A
–50–
AD9891/AD9895
Table XXVIII. V1–V8 Register Map (continued)
Bit
Default
Address
Content
Width
Value
Register Name
Register Description
189
[0]
1
00
V1INVFIRST0
V1 Sequence Inversion for Region #0 (First Lines)
18A
[3:0]
4
00
V1SPTRSECOND0
V1 Sequence for Region #0 (Second Lines)
18B
[0]
1
00
V1INVSECOND0
V1 Sequence Inversion for Region #0 (Second Lines)
18C
[5:0]
6
34
V4_7START4[5:0]
V1 and V5 Sequence Start for Region #0
18D
[5:0]
6
00
V1_5START0[11:6]
18E
[3:0]
4
00
V2SPTRFIRST0
V2 Sequence for Region #0 (First Lines)
18F
[0]
1
00
V2INVFIRST0
V2 Sequence Inversion for Region #0 (First Lines)
190
[3:0]
4
00
V2SPTRSECOND0
V2 Sequence for Region #0 (Second Lines)
191
[0]
1
00
V2INVSECOND0
V2 Sequence Inversion for Region #0 (Second Lines)
192
[5:0]
6
3D
V4_7START4[5:0]
V2 and V6 Sequence Start for Region #0
193
[5:0]
6
00
V2_6START0[11:6]
194
[3:0]
4
01
V3SPTRFIRST0
V3 Sequence for Region #0 (First Lines)
195
[0]
1
00
V3INVFIRST0
V3 Sequence Inversion for Region #0 (First Lines)
196
[3:0]
4
00
V3SPTRSECOND0
V3 Sequence for Region #0 (Second Lines)
197
[0]
1
00
V3INVSECOND0
V3 Sequence Inversion for Region #0 (Second Lines)
198
[5:0]
6
34
V4_7START4[5:0]
V3 and V7 Sequence Start for Region #0
199
[5:0]
6
00
V3_7START0[11:6]
19A
[3:0]
4
01
V4SPTRFIRST0
V4 Sequence for Region #0 (First Lines)
19B
[0]
1
00
V4INVFIRST0
V4 Sequence Inversion for Region #0 (First Lines)
19C
[3:0]
4
00
V4SPTRSECOND0
V4 Sequence for Region #0 (Second Lines)
19D
[0]
1
00
V4INVSECOND0
V4 Sequence Inversion for Region #0 (Second Lines)
19E
[5:0]
6
3D
V4_8START0[5:0]
V4 and V8 Sequence Start for Region #0
19F
[5:0]
6
00
V4_8START0[11:6]
1A0
[5:0]
6
00
V1_4FREEZE0[5:0]
V1–V4 Freeze Start Position for Region #0
1A1
[5:0]
6
00
V1_4FREEZE0[11:6]
1A2
[5:0]
6
00
V1_4RESUME0[5:0]
V1–V4 Resume Start Position for Region #0
1A3
[5:0]
6
00
V1_4RESUME0[11:6]
1A4
[5:0]
6
00
V5_8FREEZE0[5:0]
V5–V8 Freeze Start Position for Region #0
1A5
[5:0]
6
00
V5_8FREEZE0[11:6]
1A6
[5:0]
6
00
V5_8RESUME0[5:0]
V5–V8 Resume Start Position for Region #0
1A7
[5:0]
6
00
V5_8RESUME0[11:6]
1A8
[0]
1
00
SWEEP1
V Sweep for Region #1
1A9
[0]
1
00
MULTI1
V Multiplier for Region #1
1AA
[5:0]
6
3F
HDLEN1[5:0]
Region #1 HD Line Length
1AB
[5:0]
6
3F
HDLEN1[11:6]
1AC
[1:0]
2
00
HBLKSPTR1
HBLK Sequence for Region #1
1AD
[0]
1
00
VTPALT1
V Sequence Alternation for Region #1
1AE
[3:0]
4
00
V1SPTRFIRST1
V1 Sequence for Region #1 (First Lines)
1AF
[0]
1
00
V1INVFIRST1
V1 Sequence Inversion for Region #1 (First Lines)
1B0
[3:0]
4
00
V1SPTRSECOND1
V1 Sequence for Region #1 (Second Lines)
1B1
[0]
1
00
V1INVSECOND1
V1 Sequence Inversion for Region #1 (Second Lines)
1B2
[5:0]
6
00
V1_5START1[5:0]
V1 and V5 Sequence Start for Region #1
1B3
[5:0]
6
00
V1_5START1[11:6]
1B4
[3:0]
4
00
V2SPTRFIRST1
V2 Sequence for Region #1 (First Lines)
1B5
[0]
1
00
V2INVFIRST1
V2 Sequence Inversion for Region #1 (First Lines)
1B6
[3:0]
4
00
V2SPTRSECOND1
V2 Sequence for Region #1 (Second Lines)
1B7
[0]
1
00
V2INVSECOND1
V2 Sequence Inversion for Region #1 (Second Lines)
1B8
[5:0]
6
00
V2_6START1[5:0]
V2 and V6 Sequence Start for Region #1
1B9
[5:0]
6
00
V2_6START1[11:6]
1BA
[3:0]
4
00
V3SPTRFIRST1
V3 Sequence for Region #1 (First Lines)
1BB
[0]
1
00
V3INVFIRST1
V3 Sequence Inversion for Region #1 (First Lines)
1BC
[3:0]
4
00
V3SPTRSECOND1
V3 Sequence for Region #1 (Second Lines)
1BD
[0]
1
00
V3INVSECOND1
V3 Sequence Inversion for Region #1 (Second Lines)
1BE
[5:0]
6
00
V3_7START1[5:0]
V3 and V7 Sequence Start for Region #1
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