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参数资料
| 型号： | AD9895KBCZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 48/58页 |
| 文件大小： | 0K |
| 描述： | IC CCD SIGNAL PROC/GEN 64-CSPBGA |
| 标准包装： | 2,000 |
| 类型： | CCD 信号处理器，12 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFBGA，CSPBGA |
| 供应商设备封装： | 64-CSPBGA（9x9） |
| 包装： | 带卷 (TR) |
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REV. A
–52–
AD9891/AD9895
Table XXVIII. V1–V8 Register Map (continued)
Bit
Default
Address
Content
Width
Value
Register Name
Register Description
1F6
[5:0]
6
3F
HDLEN3[5:0]
Region #3 HD Line Length
1F7
[5:0]
6
3F
HDLEN3[11:6]
1F8
[1:0]
200
HBLKSPTR3
HBLK Sequence for Region #3
1F9
[0]
100
VTPALT3
VTP Sequence Alternation for Region #3
1FA
[3:0]
4
00
V1SPTRFIRST3
V1 Sequence for Region #3 (First Lines)
1FB
[0]
1
00
V1INVFIRST3
V1 Sequence Inversion for Region #3 (First Lines)
1FC
[3:0]
4
00
V1SPTRSECOND3
V1 Sequence for Region #3 (Second Lines)
1FD
[0]
1
00
V1INVSECOND3
V1 Sequence Inversion for Region #3 (Second Lines)
1FE
[5:0]
6
00
V1_5START3[5:0]
V1 and V5 Sequence Start for Region #3
1FF
[5:0]
6
00
V1_5START3[11:6]
200
[3:0]
4
00
V2SPTRFIRST3
V2 Sequence for Region #3 (First Lines)
201
[0]
1
00
V2INVFIRST3
V2 Sequence Inversion for Region #3 (First Lines)
202
[3:0]
4
00
V2SPTRSECOND3
V2 Sequence for Region #3 (Second Lines)
203
[0]
1
00
V2INVSECOND3
V2 Sequence Inversion for Region #3 (Second Lines)
204
[5:0]
6
00
V2_6START3[5:0]
V2 and V6 Sequence Start for Region #3
205
[5:0]
6
00
V2_6START3[11:6]
206
[3:0]
4
00
V3SPTRFIRST3
V3 Sequence for Region #3 (First Lines)
207
[0]
1
00
V3INVFIRST3
V3 Sequence Inversion for Region #3 (First Lines)
208
[3:0]
4
00
V3SPTRSECOND3
V3 Sequence for Region #3 (Second Lines)
209
[0]
1
00
V3INVSECOND3
V3 Sequence Inversion for Region #3 (Second Lines)
20A
[5:0]
6
00
V3_7START3[5:0]
V3 and V7 Sequence Start for Region #3
20B
[5:0]
6
00
V3_7START3[11:6]
20C
[3:0]
4
00
V4SPTRFIRST3
V4 Sequence for Region #3 (First Lines)
20D
[0]
1
00
V4INVFIRST3
V4 Sequence Inversion for Region #3 (First Lines)
20E
[3:0]
4
00
V4SPTRSECOND3
V4 Sequence for Region #3 (Second Lines)
20F
[0]
1
00
V4INVSECOND3
V4 Sequence Inversion for Region #3 (Second Lines)
210
[5:0]
6
00
V4_8START3[5:0]
V4 and V8 Sequence Start for Region #3
211
[5:0]
6
00
V4_8START3[11:6]
212
[5:0]
6
00
V1_4FREEZE3[5:0]
V1–V4 Freeze Start Position for Region #3
213
[5:0]
6
00
V1_4FREEZE3[11:6]
214
[5:0]
6
00
V1_4RESUME3[5:0]
V1–V4 Resume Start Position for Region #3
215
[5:0]
6
00
V1_4RESUME3[11:6]
216
[5:0]
6
00
V5_8FREEZE3[5:0]
V5–V8 Freeze Start Position for Region #3
217
[5:0]
6
00
V5_8FREEZE3[11:6]
218
[5:0]
6
00
V5_8RESUME3[5:0]
V5–V8 Resume Start Position for Region #3
219
[5:0]
6
00
V5_8RESUME3[11:6]
21A
[0]
1
00
SWEEP4
V Sweep for Region #4
21B
[0]
1
00
MULTI4
V Multiplier for Region #4
21C
[5:0]
6
3F
HDLEN4[5:0]
Region #4 HD Line Length
21D
[5:0]
6
3F
HDLEN4[11:6]
21E
[1:0]
2
00
HBLKSPTR4
HBLK Sequence for Region #4
21F
[0]
100
VTPALT4
VTP Sequence Alternation for Region #4
220
[3:0]
4
00
V1SPTRFIRST4
V1 Sequence for Region #4 (First Lines)
221
[0]
1
00
V1INVFIRST4
V1 Sequence Inversion for Region #4 (First Lines)
222
[3:0]
4
00
V1SPTRSECOND4
V1 Sequence for Region #4 (Second Lines)
223
[0]
1
00
V1INVSECOND4
V1 Sequence Inversion for Region #4 (Second Lines)
224
[5:0]
6
00
V1_5START4[5:0]
V1 and V5 Sequence Start for Region #4
225
[5:0]
6
00
V1_5START4[11:6]
226
[3:0]
4
00
V2SPTRFIRST4
V2 Sequence for Region #4 (First Lines)
227
[0]
1
00
V2INVFIRST4
V2 Sequence Inversion for Region #4 (First Lines)
228
[3:0]
4
00
V2SPTRSECOND4
V2 Sequence for Region #4 (Second Lines)
229
[0]
1
00
V2INVSECOND4
V2 Sequence Inversion for Region #4 (Second Lines)
22A
[5:0]
6
00
V2_6START4[5:0]
V2 and V6 Sequence Start for Region #4
22B
[5:0]
6
00
V2_6START4[11:6]
22C
[3:0]
4
00
V4SPTRFIRST4
V4 Sequence for Region #4 (First Lines)
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