参数资料
| 型号： | ADM1060ARU |
| 厂商： | Analog Devices Inc |
| 文件页数： | 46/52页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVIS/SEQUENC 7-CH 28TSSOP |
| 标准包装： | 50 |
| 系列： | Super Sequencer® |
| 类型： | 序列发生器 |
| 监视电压数目： | 7 |
| 输出： | 可编程 |
| 电压 - 阀值： | 可调节/可选择 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 管件 |
| 配用： | EVAL-ADM1060EBZ-ND - BOARD EVALUATION ADM1060 |
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ADM1060
BLOCK READ
In this operation, the master device reads a block of data from a
slave device. The start address for a block read must previously
have been set. In the case of the ADM1060, this is done by a
Send Byte operation to set a RAM address, or a Write
Byte/Word operation to set an EEPROM address. The block
read operation itself consists of a Send Byte operation that
sends a block read command to the slave, immediately followed
by a repeated start and a read operation that reads out multiple
data bytes, as follows:
1. The master device asserts a START condition on SDA.
2. The master sends the 7-bit slave address followed by the
write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a command code that tells the slave device
to expect a block read. The ADM1060 command code for a
block read is 0xFD (1111 1101 binary).
5. The slave asserts ACK on SDA.
6. The master asserts a repeat start condition on SDA.
ERROR CORRECTION
The ADM1060 provides the option of issuing a PEC (packet
error correction) byte after a write to RAM, a write to
EEPROM, a block write to RAM/EEPROM, or a block read
from RAM/EEPROM. This enables the user to verify that the
data received by or sent from the ADM1060 is correct. The PEC
byte is an optional byte sent after the last data byte has been
written to or read from the ADM1060. The protocol is as
follows:
1. The ADM1060 issues a PEC byte to the master. The master
should check the PEC byte and issue another block read if the
PEC byte is incorrect.
2. A NACK is generated after the PEC byte to signal the end of
the read.
Note: The PEC byte is calculated using CRC-8. The Frame
Check Sequence (FCS) conforms to CRC-8 by the polynomial
C ( x ) = x 8 + x 2 + x 1 + 1
Consult the SMBus 1.1 specification for more information. An
example of a block read with the optional PEC byte is shown in
7. The master sends the 7-bit slave address followed by the
1
2
3
4
5 6
7
8
9
10
11
12
read bit (high).
S
SLAVE
ADDRESS W A
COMMAND 0xFD
(BLOCK READ)
A S
SLAVE
ADDRESS
BYTE
R A COUNT A DATA 1 A
8. The slave asserts ACK on SDA.
13
14 15
9. The ADM1060 sends a byte count data byte that tells the
DATA
32
A PEC
A P
master how many data bytes to expect. The ADM1060 will
always return 32 data bytes (0x20), which is the maximum
allowed by the SMBus 1.1 specification.
10. The master asserts ACK on SDA.
11. The master receives 32 data bytes.
12. The master asserts ACK on SDA after each data byte.
13. The master asserts a STOP condition on SDA to end the
transaction.
Figure 36. Block Read from EEPROM or RAM with PEC
1
2
3
4
5 6
7
8
9
10
11
12
S
SLAVE
ADDRESS W A
COMMAND 0xFD
(BLOCK READ)
A S
SLAVE
ADDRESS
BYTE
R A COUNT A DATA 1 A
13 14
DATA
32
A P
Figure 35. Block Read from EEPROM or RAM
Rev. B | Page 46 of 52
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| ADM1060ARUCS0001R7 | 功能描述:IC SUPERVISOR/SEQUENCER 制造商:analog devices inc. 系列:* 零件状态:上次购买时间 标准包装:1 |
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