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参数资料
| 型号： | ADP1043A-USB-Z |
| 厂商： | Analog Devices Inc |
| 文件页数： | 53/72页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD DIG POWER SUPPLY |
| 标准包装： | 1 |
| 附件类型： | 连接 USB 至 I2C 的接收器 |
| 适用于相关产品： | ADP1043A |
| 相关产品： | ADP1043AACPZ-RLDKR-ND - IC SECONDARY SIDE CTRLR 32LFCSP ADP1043AACPZ-RLCT-ND - IC SECONDARY SIDE CTRLR 32LFCSP ADP1043AACPZ-RLTR-ND - IC SECONDARY SIDE CTRLR 32LFCSP |
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ADP1043A
Table 60. Register 0x41—OUTA Rising Edge Timing (OUTA Pin)
Bits
[7:0]
Name
t 1
R/W
R/W
Description
This register contains the eight MSBs of the 12-bit t 1 time. This value is always used with
the top four bits of Register 0x42, which contains the four LSBs of the t 1 time. Each LSB
corresponds to 5 ns resolution.
Table 61. Register 0x42—OUTA Rising Edge Setting (OUTA Pin)
Bits
[7:4]
Name
t 1
R/W
R/W
Description
These bits contain the four LSBs of the 12-bit t 1 time. This value is always used with the eight
bits of Register 0x41, which contains the eight MSBs of the t 1 time. Each LSB corresponds to
5 ns resolution.
3
Modulate enable
R/W
1 = PWM modulation acts on the t 1 edge.
0 = no PWM modulation of the t 1 edge.
2
t 1 sign
R/W
1 = negative sign. Increase of PWM modulation moves t 1 right.
0 = positive sign. Increase of PWM modulation moves t 1 left.
[1:0]
Reserved
R/W
Reserved. These bits should be set to 00 for normal operation.
Table 62. Register 0x43—OUTA Falling Edge Timing (OUTA Pin)
Bits
[7:0]
Name
t 2
R/W
R/W
Description
This register contains the eight MSBs of the 12-bit t 2 time. This value is always used with
the top four bits of Register 0x44, which contains the four LSBs of the t 2 time. Each LSB
corresponds to 5 ns resolution.
Table 63. Register 0x44—OUTA Falling Edge Setting (OUTA Pin)
Bits
[7:4]
Name
t 2
R/W
R/W
Description
These bits contain the four LSBs of the 12-bit t 2 time. This value is always used with the eight
bits of Register 0x43, which contains the eight MSBs of the t 2 time. Each LSB corresponds to
5 ns resolution.
3
Modulate enable
R/W
1 = PWM modulation acts on the t 2 edge.
0 = no PWM modulation of the t 2 edge.
2
t 2 sign
R/W
1 = negative sign. Increase of PWM modulation moves t 2 right.
0 = positive sign. Increase of PWM modulation moves t 2 left.
[1:0]
Reserved
R/W
Reserved. These bits should be set to 00 for normal operation.
Table 64. Register 0x45—OUTB Rising Edge Timing (OUTB Pin)
Bits
[7:0]
Name
t 3
R/W
R/W
Description
This register contains the eight MSBs of the 12-bit t 3 time. This value is always used with
the top four bits of Register 0x46, which contains the four LSBs of the t 3 time. Each LSB
corresponds to 5 ns resolution.
Table 65. Register 0x46—OUTB Rising Edge Setting (OUTB Pin)
Bits
[7:4]
Name
t 3
R/W
R/W
Description
These bits contain the four LSBs of the 12-bit t 3 time. This value is always used with the eight
bits of Register 0x45, which contains the eight MSBs of the t 3 time. Each LSB corresponds to
5 ns resolution.
3
Modulate enable
R/W
1 = PWM modulation acts on the t 3 edge.
0 = no PWM modulation of the t 3 edge.
2
t 3 sign
R/W
1 = negative sign. Increase of PWM modulation moves t 3 right.
0 = positive sign. Increase of PWM modulation moves t 3 left.
[1:0]
Reserved
R/W
Reserved. These bits should be set to 00 for normal operation.
Rev. 0 | Page 53 of 72
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相关代理商/技术参数 |
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|---|---|
| ADP1043-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARDS - Bulk |
| ADP1043FB100-EVALZ | 制造商:Analog Devices 功能描述:ADP1043 100W EVALUATION BOARD |
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| ADP1046-100-EVALZ | 功能描述:BOARD EVAL FOR ADP1046-100 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:- 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
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