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| 型号： | ADP1043A-USB-Z |
| 厂商： | Analog Devices Inc |
| 文件页数： | 68/72页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD DIG POWER SUPPLY |
| 标准包装： | 1 |
| 附件类型： | 连接 USB 至 I2C 的接收器 |
| 适用于相关产品： | ADP1043A |
| 相关产品： | ADP1043AACPZ-RLDKR-ND - IC SECONDARY SIDE CTRLR 32LFCSP ADP1043AACPZ-RLCT-ND - IC SECONDARY SIDE CTRLR 32LFCSP ADP1043AACPZ-RLTR-ND - IC SECONDARY SIDE CTRLR 32LFCSP |
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ADP1043A
Table 116. Register 0x45—OUTB Rising Edge Dead Time in Resonant Mode
Bits
[7:0]
Name
Δt 3 (rising edge dead
time of OUTB)
R/W
R/W
Description
This register sets Δt 3 , which is the delay time of the rising edge of OUTB from the start of the
switching cycle, t A . Each LSB corresponds to 5 ns of resolution.
Bit 7
0
0
…
1
Bit 6
0
0
…
1
Bit 5
0
0
…
1
Bit 4
0
0
…
1
Bit 3
0
0
…
1
Bit 2
0
0
…
1
Bit 1
0
0
…
1
Bit 0
0
1
…
1
Δt 3 (ns)
0
5
…
1275
Table 117. Register 0x46—Highest Switching Frequency Limit Setting (Minimum Switching Cycle in Resonant Mode)
Bits
[7:0]
Name
Highest frequency
R/W
R/W
Description
This register contains the eight MSBs of the 12-bit value of the highest switching frequency (mini-
mum switching cycle) limit. This value is always used with the top four bits of Register 0x48,
which contain the four LSBs of the highest switching frequency limit. Each LSB of the 12-bit
value corresponds to 5 ns of resolution for the switching cycle. For example, if Register 0x46
is set to 0x10 (16 decimal) and Bits[7:4] of Register 0x48 are set to 0x9 (9 decimal), the minimum
switching cycle is (16 × 16 + 9) × 5 ns = 1.325 μs, and the highest switching frequency limit is
1/1.325 μs = 755 kHz.
Table 118. Register 0x47—OUTB Fallin g Edge Dead Time in Resonant Mode
Bits
[7:0]
Name
Δt 4 (falling edge dead
time of OUTB)
R/W
R/W
Description
This register sets Δt 4 , which is the difference between the falling edge of OUTB and the mid-
point of the switching cycle, t B . Each LSB corresponds to 5 ns of resolution. When the register
value is from 0x00 to 0x7F, the falling edge of OUTB is trailing t B . When the value is from 0x80
to 0xFF, the falling edge of OUTB is leading t B .
Bit 7
0
0
…
0
1
…
1
Bit 6
0
0
…
1
0
…
1
Bit 5
0
0
…
1
0
…
1
Bit 4
0
0
…
1
0
…
1
Bit 3
0
0
…
1
0
…
1
Bit 2
0
0
…
1
0
…
1
Bit 1
0
0
…
1
0
…
1
Bit 0
0
1
…
1
0
…
1
Δt 4
0 ns
5 ns trailing
…
635 ns trailing
640 ns leading
…
5 ns leading
Table 119. Register 0x48—Highest Switching Frequency Limit Setting (Minimum Switching Cycle in Resonant Mode)
Bits
[7:4]
Name
Highest frequency
R/W
R/W
Description
This register contains the four LSBs of the 12-bit value of the highest switching frequency (mini-
mum switching cycle) limit. This value is always used with the eight bits of Register 0x46, which
contain the eight MSBs of the highest switching frequency limit. Each LSB of the 12-bit value
corresponds to 5 ns of resolution for the switching cycle. For example, if Register 0x46 is set
to 0x10 (16 decimal) and Bits[7:4] of Register 0x48 are set to 0x9 (9 decimal), the minimum
switching cycle is (16 × 16 + 9) × 5 ns = 1.325 μs, and the highest switching frequency limit is
1/1.325 μs = 755 kHz.
[3:0]
Reserved
R/W
Reserved.
Rev. 0 | Page 68 of 72
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP1043-EVALZ | 制造商:Analog Devices 功能描述:EVALUATION BOARDS - Bulk |
| ADP1043FB100-EVALZ | 制造商:Analog Devices 功能描述:ADP1043 100W EVALUATION BOARD |
| ADP1045ACPZ-RL | 制造商:Analog Devices 功能描述: |
| ADP1046 | 制造商:AD 制造商全称:Analog Devices 功能描述:Digital Controller for Isolated |
| ADP1046-100-EVALZ | 功能描述:BOARD EVAL FOR ADP1046-100 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:- 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
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