参数资料
型号: ADSP-21160MKB-80
厂商: Analog Devices Inc
文件页数: 49/52页
文件大小: 0K
描述: IC DSP CONTROLLER 32BIT 400 BGA
产品培训模块: SHARC Processor Overview
标准包装: 1
系列: SHARC®
类型: 浮点
接口: 主机接口,连接端口,串行端口
时钟速率: 80MHz
非易失内存: 外部
芯片上RAM: 512kB
电压 - 输入/输出: 3.30V
电压 - 核心: 2.50V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 400-BBGA
供应商设备封装: 400-PBGA(27x27)
包装: 托盘
ADSP-21160M
–6–
REV. 0
transmit and receive functions provide greater flexibility for
serial communications. Serial port data can be automati-
cally transferred to and from on-chip memory via a
dedicated DMA. Each of the serial ports offers a TDM
multichannel mode. The serial ports can operate with lit-
tle-endian or big-endian transmission formats, with word
lengths selectable from 3 bits to 32 bits. They offer selectable
synchronization and transmit modes as well as optional
-law or A-law companding. Serial port clocks and frame
syncs can be internally or externally generated.
Host Processor Interface
The ADSP-21160M host interface allows easy connection
to standard microprocessor buses, both 16-bit and 32-bit,
with little additional hardware required. The host interface
is accessed through the ADSP-21160M’s external port and
is memory-mapped into the unified address space. Four
channels of DMA are available for the host interface; code
and data transfers are accomplished with low software
overhead. The host processor communicates with the
ADSP-21160M’s external bus with host bus request
(HBR), host but grant (HBG), ready (REDY), acknowledge
(ACK), and chip select (CS) signals. The host can directly
read and write the internal memory of the ADSP-21160M,
and can access the DMA channel setup and mailbox regis-
ters. Vector interrupt support provides efficient execution
of host commands.
Program Booting
The internal memory of the ADSP-21160M can be booted
at system power-up from an 8-bit EPROM, a host proces-
sor, or through one of the link ports. Selection of the boot
source is controlled by the BMS (Boot Memory Select),
EBOOT (EPROM Boot), and LBOOT (Link/Host Boot)
pins. 32-bit and 16-bit host processors can be used
for booting.
Phased Locked Loop
The ADSP-21160M uses an on-chip PLL to generate the
internal clock for the core. Ratios of 2:1, 3:1, and 4:1
between the core and CLKIN are supported. The
CLK_CFG pins are used to select the ratio. The CLKIN
rate is the rate at which the synchronous external
port operates.
Power Supplies
The ADSP-21160Mhas separate power supply connections
for the internal (V
DDINT), external (VDDEXT), and analog
(AV
DD/AGND) power supplies. The internal and analog
supplies must meet the 2.5 V requirement. The external
supply must meet the 3.3 V requirement. All external supply
pins must be connected to the same supply.
Note that the analog supply (AV
DD) powers the
ADSP-21160M’s clock generator PLL. To produce a stable
clock, the system must provide an external circuit to filter
the power input to the AV
DD pin. Place the filter as close as
possible to the pin. For an example circuit, see Figure 5. To
prevent noise coupling, use a wide trace for the analog
ground (AGND) signal and install a decoupling capacitor
as close as possible to the pin.
Figure 4. Shared Memory Multiprocessing System
$''5±
'$7$ ±
3$
%06
&21752/
$'63[
3$
%5 %5±
%5
&21752/
$'63[
$''5±
'$7$ ±
3$
%5± %5±
%5
&21752/
$'63[
,'±
5(6(7
53%$
&/.,1
,'±
5(6(7
53%$
,'±
5(6(7
53%$
&/.,1
$'63[
&/2&.
5(6(7
$''5
'$7$
+2 67
352 &( 662 5
,1 7( 5 )$&(
23 7,21 $/
$&.
*/2%$/
0( 02 5<
$1 '
3( 5,3+ (5$/6
23 7,21 $/
2(
$''5
'$7 $
&6
$''5
'$7$
%22 7 (35 20
23 7,21 $/
5';
06±
6%76
&/.287
&6
$&.
$'' 5±
'$7$ ±
&/.,1
3$*(
%5
%5±
5('<
+%*
+%5
&6
:(
:5;
&
2
17
52
/
$'
'
5
(
6
'$
7
$
&
2
17
52
/
$
'
5
(66
'$
7
$
相关PDF资料
PDF描述
ADSP-21160NCB-100 IC DSP CONTROLLER 32BIT 400BGA
ADSP-21161NCCA-100 IC DSP CONTROLLER 32BIT 225MBGA
ADSP-21261SKBCZ150 IC DSP 32BIT 150MHZ 136-CSPBGA
ADSP-21368KBPZ-3A IC DSP 32BIT 400MHZ 256BGA
ADSP-21371BSWZ-2B IC DSP 32BIT 266MHZ 208-LQFP
相关代理商/技术参数
参数描述
ADSP-21160MKBZ-80 功能描述:IC DSP CONTROLLER 32BIT 400 BGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP(数字式信号处理器) 系列:SHARC® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI,以太网,RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA,FCBGA 供应商设备封装:431-FCPBGA(20x20) 包装:托盘
ADSP-21160N 制造商:AD 制造商全称:Analog Devices 功能描述:DSP Microcomputer
ADSP-21160NCB-100 功能描述:IC DSP CONTROLLER 32BIT 400BGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - DSP(数字式信号处理器) 系列:SHARC® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI,以太网,RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA,FCBGA 供应商设备封装:431-FCPBGA(20x20) 包装:托盘
ADSP-21160NCB-TBD 制造商:AD 制造商全称:Analog Devices 功能描述:DSP Microcomputer
ADSP-21160NCBZ-100 功能描述:IC DSP CONTROLLER 32BIT 400-PBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP(数字式信号处理器) 系列:SHARC® 标准包装:40 系列:TMS320DM64x, DaVinci™ 类型:定点 接口:I²C,McASP,McBSP 时钟速率:400MHz 非易失内存:外部 芯片上RAM:160kB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:0°C ~ 90°C 安装类型:表面贴装 封装/外壳:548-BBGA,FCBGA 供应商设备封装:548-FCBGA(27x27) 包装:托盘 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA