参数资料
型号: ADSP-21160MKB-80
厂商: Analog Devices Inc
文件页数: 5/52页
文件大小: 0K
描述: IC DSP CONTROLLER 32BIT 400 BGA
产品培训模块: SHARC Processor Overview
标准包装: 1
系列: SHARC®
类型: 浮点
接口: 主机接口,连接端口,串行端口
时钟速率: 80MHz
非易失内存: 外部
芯片上RAM: 512kB
电压 - 输入/输出: 3.30V
电压 - 核心: 2.50V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 400-BBGA
供应商设备封装: 400-PBGA(27x27)
包装: 托盘
–13–
REV. 0
ADSP-21160M
ADSP-21160M SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
Signal
K Grade Parameter
1
Min
Max
Unit
V
DDINT
Internal (Core) Supply Voltage
2.37
2.63
V
AV
DD
Analog (PLL) Supply Voltage
2.37
2.63
V
DDEXT
External (I/O) Supply Voltage
3.13
3.47
V
IH1
High Level Input Voltage2, @ V
DDEXT =Max
2.2
V
DDEXT +0.5
V
IH2
High Level Input Voltage3, @ V
DDEXT =Max
2.3
V
DDEXT +0.5
V
IL
Low Level Input Voltage2,3, @ V
DDEXT =Min
–0.5
0.8
V
T
CASE
Case Operating Temperature4
085
C
1 Specifications subject to change without notice.
2 Applies to input and bidirectional pins: DATA63–0, ADDR31–0, RDx, WRx, ACK, SBTS, IRQ2–0, FLAG3–0, HBG, CS, DMAR1, DMAR2, BR6–1,
ID2–0, RPBA, PA, BRST, TFS0, TFS1, RFS0, RFS1, LxDAT3–0, LxCLK, LxACK, EBOOT, LBOOT, BMS, TMS, TDI, TCK, HBR, DR0, DR1,
TCLK0, TCLK1, RCLK0, RCLK1.
3 Applies to input pins: CLKIN, RESET, TRST.
4 See Environmental Conditions on page 45 for information on thermal specifications.
ELECTRICAL CHARACTERISTICS
Parameter
1
Test Conditions
Min
Max
Unit
V
OH
High Level Output Voltage2
@ V
DDEXT =Min, IOH = –2.0 mA
3
2.4
V
OL
Low Level Output Voltage2
@ V
DDEXT =Min, IOL =4.0 mA
0.4
V
I
IH
High Level Input Current4,5,6
@ V
DDEXT =Max, VIN =VDD Max
10
A
I
IL
Low Level Input Current4
@ V
DDEXT =Max, VIN =0 V
10
A
I
ILPU1
Low Level Input Current
Pull-Up15
@ V
DDEXT =Max, VIN = 0 V
250
A
I
ILPU2
Low Level Input Current
Pull-Up26
@ V
DDEXT =Max, VIN = 0 V
500
A
I
OZH
Three-State Leakage Current7,8,9,10
@ V
DDEXT =Max, VIN=VDD Max
10
A
I
OZL
Three-State Leakage Current7
@ V
DDEXT =Max, VIN =0 V
10
A
I
OZHPD
Three-State Leakage Current
Pull-Down10
@ V
DDEXT =Max, VIN =VDD Max
250
A
I
OZLPU1
Three-State Leakage Current
Pull-Up18
@ V
DDEXT =Max, VIN = 0 V
250
A
I
OZLPU2
Three-State Leakage Current
Pull-Up29
@ V
DDEXT =Max, VIN = 0 V
500
A
I
OZHA
Three-State Leakage Current11
@ V
DDEXT =Max, VIN =VDD Max
25
A
I
OZLA
Three-State Leakage Current11
@ V
DDEXT =Max, VIN =0 V
4
mA
I
DD-INPEAK
Supply Current (Internal)12
t
CCLK = 12.5 ns, VDDINT = Max
1400
mA
I
DD-INHIGH
Supply Current (Internal)13
t
CCLK = 12.5 ns, VDDINT = Max
875
mA
I
DD-INLOW
Supply Current (Internal)14
t
CCLK = 12.5 ns, VDDINT = Max
625
mA
I
DD-IDLE
Supply Current (Idle)15
t
CCLK = 12.5 ns, VDDINT =Max
80
mA
AI
DD
Supply Current (Analog)16
@AV
DD =Max
10
mA
C
IN
Input Capacitance17,18
f
IN =1 MHz, TCASE =25°C, VIN =2.5 V
4.7
pF
1 Specifications subject to change without notice.
2 Applies to output and bidirectional pins: DATA63–0, ADDR31–0, MS3–0, RDx, WRx, PAGE, CLKOUT, ACK, FLAG3–0, TIMEXP, HBG, REDY,
DMAG1, DMAG2, BR6–1, PA, BRST, CIF, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1, LxDAT3–0, LxCLK, LxACK,
BMS, TDO, EMU.
3 See Output Drive Currents on page 42 for typical drive current capabilities.
4 Applies to input pins: ACK, SBTS, IRQ2–0, HBR, CS, ID2–0, RPBA, EBOOT, LBOOT, CLKIN, RESET, TCK, CLK_CFG3-0.
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