参数资料
| 型号： | ADT7462ZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 17/82页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADT7462 |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 1 |
| 类型： | 温度传感器 |
| 适用于相关产品： | ADT7462 |
| 所含物品： | 评估板 |
| 其它名称： | EVAL-ADT7462EBZ EVAL-ADT7462EBZ-ND |
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ADT7462
S ADDRESS W A
A
DATA A P
S
W A
A P
Write Operations
The SMBus specification defines several protocols for
different types of read and write operations. The ones used
in the ADT7462 are discussed below. The following
abbreviations are used in the diagrams:
? S ? Start
? P ? Stop
? R ? Read
? W ? Write
? A ? Acknowledge
? A ? No Acknowledge
The ADT7462 uses the following SMBus write protocols.
Send Byte
In this operation, the master device sends a single
command byte to a slave device as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts an ACK on SDA.
4. The master sends a command code.
5. The slave asserts an ACK on SDA.
6. The master asserts a stop condition on SDA to end
the transaction.
For the ADT7462, the send byte protocol is used to write
a register address to RAM for a subsequent single byte read
from the same address. This operation is shown in Figure 27.
1 2 3 4 5 6
SLAVE REGISTER
ADDRESS ADDRESS
Figure 27. Setting a Register Address for
Subsequent Read
If it is required to read data from the register immediately
after setting up the address, the master can assert a repeat
start condition immediately after the final ACK and carry
out a single byte read without asserting an intermediate stop
condition.
Write Byte
In this operation, the master device sends a command byte
and one data byte to the slave device as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts an ACK on SDA.
4. The master sends a command code.
5. The slave asserts an ACK on SDA.
6. The master sends a data byte.
7. The slave asserts an ACK on SDA.
8. The master asserts a stop condition on SDA to end
the transaction.
1 2 3 4 5 6 7 8
SLAVE SLAVE
ADDRESS
Figure 28. Single-byte Write to a Register
Block Write
In this operation, the master device writes a block of data
to a slave device. The start address for a block write must be
set previously. In the case of the ADT7462, this is done by
a send byte operation to set a RAM address. The user writes
the number of registers to be written to in the block read
command to the #Bytes bits of the Configuration 0 register.
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts an ACK on SDA.
4. The master sends a command code that tells the
slave device to expect a block write. The
ADT7462 command code for a block write is
0xA0 (1010 0000).
5. The slave asserts an ACK on SDA.
6. The master sends the data bytes (the number of
data bytes sent is written to the #Bytes bits of the
Configuration 0 register).
7. The slave asserts an ACK on SDA after each data
byte.
8. The master sends a packet error checking (PEC) byte.
9. The ADT7462 checks the PEC byte and issues an
ACK, if correct. If incorrect (NO ACK), the
master resends the data bytes.
10. The master asserts a stop condition on SDA to end
the transaction.
1
2
3
4
5
6
7
8
9
10
11 12
S
SLAVE
ADDRESS
W
A
COMMAND
0xA0
BLOCK
A
BYTE
COUNT
A DATA 1
A DATA 2
A
DATA
32
A PEC
A
P
WRITE
Figure 29. Block Write to ADT7462
http://onsemi.com
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