参数资料
| 型号： | ADT7462ZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 53/82页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADT7462 |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 1 |
| 类型： | 温度传感器 |
| 适用于相关产品： | ADT7462 |
| 所含物品： | 评估板 |
| 其它名称： | EVAL-ADT7462EBZ EVAL-ADT7462EBZ-ND |
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ADT7462
VR_HOT Inputs
Pin 25 and Pin 26 can be configured as VR_HOT inputs.
These are specific digital signals from the CPU voltage
regulator that indicate an overtemperature. On assertion of
these inputs, the relevant status bits are set in Thermal Status
Register 2 (Host Register 0xB9 or BMC Register 0xC1).
Assertion of these inputs can also be used to boost the fans
to full speed, thus providing emergency cooling in the event
of VR overtemperature. This is set using Bit 3 (VRD1) and
Bit 4 (VRD2) of Configuration Register 2 (0x02). There is
also an associated mask bit in Register 0x31 to mask the
assertion of these inputs from the ALERT output.
SCSI_TERM Inputs
Pin 16 and Pin 20 can be configured as SCSI_TERM
inputs. An assertion on the SCSI_TERM is recorded in Bit 4
and Bit 5 of Host Digital Status Register (0xBE) or BMC
Digital Status Register (0xC6). There is also an associated
mask bit in Register 0x35 to mask the assertion of these
inputs from the ALERT output.
Reset I/O
The ADT7462 includes an active low reset pin (Pin 14).
The RESET pin can be both a reset input and output. RESET
monitors the V CC input to the ADT7462. At powerup,
RESET is asserted (pulled low) until 180 ms after the power
supply has risen above the supply threshold. A power-on
reset initializes all registers to the default values.
Software Reset
The ADT7462 can be reset in software by setting Bit 7 of
Configuration Register 0 (0x00). The code 0x6D must be
written to Register 0x7B before setting the software reset bit.
This register is cleared to the power-on default after the
software reset.
Note that not all registers are restored to their default
values on a reset. The same registers are reset by a hardware
and software reset. The Register Map section provides a
complete reference of registers that are reset.
Chassis Intrusion Input
The chassis intrusion (CI) input is an active high input
intended for detection and signaling of unauthorized
tampering with the system. When this input goes high, the
event is latched in Bit 7 of Host Digital Status Register
(0xBE), and an interrupt is generated. The bit remains set
until cleared by writing a 1 to CI reset (CI_R), Bit 5 of
Configuration Register 3 (0x03). The CI reset bit is cleared
by writing a 0 to it.
The CI circuit is powered from the V BATT voltage
channel. Pin 26 must be configured to monitor V BATT and
a battery must be connected to monitor CI events. CI
monitoring is disabled if the measured V BATT value (0x93)
is less than the lower voltage limit (0x75) of Pin 26.
The CI input detects chassis intrusion events even when
the ADT7462 is powered off (provided battery voltage is
applied to V BATT ) but does not immediately generate an
interrupt. When a chassis intrusion event is detected and
V CC
RESET
1.0 V
latched, an interrupt is generated when the system is
powered on.
The actual detection of chassis intrusion is performed by
an external circuit that detects, for example, when the cover
has been removed. A wide variety of techniques can be used
180 ms
Figure 85. Operation of RESET Output on Powerup
The RESET pin can also function as a reset input. Pulling
this pin low externally resets the ADT7462. The user should
wait at least 180 ms after powerup before doing a hardware
reset. The reset pulse width should be greater than 0.8 ms to
ensure that a reset is registered.
A hardware reset differs from a power-on reset in that not
all of the registers are reinitialized to the default values. For
example, limit registers are not all restored to the default
values. This can be useful if the user needs to reset the part
but does not want to completely reprogram the device. The
Register Map section show, which registers, are reset.
Locked registers are not restored to default values by a
hardware reset.
Note that if two ADT7462 devices are used in one system,
the RESET pins should not be connected together between
devices. Doing so causes one device to reset the other on a
power-on reset.
for chassis detection. For example,
? A microswitch that opens or closes when the cover is
removed
? A reed switch operated by a magnet affixed to the cover
? A hall-effect switch operated by a magnet affixed to the
cover
? A photo-transistor that detects light when the cover is
removed
Powerup Sequence
The powerup sequence of the ADT7462 is as follows:
1. The temperature of the thermal diode connected to
Pin 17 and Pin 18 (only dedicated thermal diode
channel) is monitored immediately on powerup of
the ADT7462. Ideally, the hottest zone should be
connected to this channel so protection is provided
immediately on powerup.
2. V CCP1 is also monitored immediately on powerup.
V CCP1 is typically connected to a main power rail.
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| ADT7463 | 制造商:AD 制造商全称:Analog Devices 功能描述:dB COOL Remote Thermal Controller and Voltage Monitor |
| ADT7463ARQ | 功能描述:IC REMOTE THERMAL CTRLR 24-QSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 热管理 系列:dBCool® 标准包装:1 系列:- 功能:温度监控系统（传感器） 传感器类型:内部和外部 感应温度:-40°C ~ 125°C，外部传感器 精确度:±2.5°C 本地（最大值），±5°C 远程（最大值） 拓扑:ADC，比较器，寄存器库 输出类型:2 线 SMBus? 输出警报:无 输出风扇:无 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:SOT-23-8 供应商设备封装:SOT-23-8 包装:Digi-Reel® 其它名称:296-22675-6 |
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