参数资料
| 型号： | ADT7462ZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 31/82页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADT7462 |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 1 |
| 类型： | 温度传感器 |
| 适用于相关产品： | ADT7462 |
| 所含物品： | 评估板 |
| 其它名称： | EVAL-ADT7462EBZ EVAL-ADT7462EBZ-ND |
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ADT7462
PWM1
PWM2
sensed on TACH1 only, connect TACH1 and TACH2
together.
FAN 1
FAN 2
FAN 3
FAN 4
?
Turn off pulse stretching on the unused TACH input;
that is, if PWM1 is driving a single fan being sensed on
TACH1 only, turn off pulse stretching on TACH2 in
TACH 1
TACH 5
TACH 2
TACH 6
TACH 3
TACH 7
TACH 4
TACH 8
Register 0x08. In this register:
Bit 0 controls pulse stretching on TACH1 and TACH5.
Bit 1 controls pulse stretching on TACH2 and TACH6.
FAN 5
FAN 6
FAN 7
FAN 8
Bit 2 controls pulse stretching on TACH3 and TACH7.
Bit 3 controls pulse stretching on TACH4 and TACH8.
PWM3 PWM4
Figure 48. Synchronizing Fan PWM Output and
TACH Inputs
Driving and Measuring the Speed of One Fan from
One PWM Output
If four single fans are being controlled and measured by
the ADT7462, the following configuration should be used.
This applies only to 3-wire fans controlled using low
frequency PWM with pulse stretching enabled.
Fan 1 is driven by PWM1 and measured using TACH1.
Fan 2 is driven by PWM2 and measured using TACH3.
Fan 3 is driven by PWM3 and measured using TACH5.
Fan 4 is driven by PWM4 and measured using TACH7.
Note that the TACH assignments in this register differ
from the TACHs synchronized to each PWM output.
Therefore, if the intention is to drive and sense four fans,
connecting the TACHs together as described in Option 1
allows pulse stretching on all channels.
To enable fan speed measurements four times a second,
set the FAST bit (Bit 0) of Configuration Register 2 (0x02).
When the FAST bit is set, fan TACH readings are updated
every 250 ms.
Fan Speed Measurement Registers
Fan speed measurement involves a 2-register read for
each measurement. The low byte should be read first. This
causes the high byte to be frozen until both high and low byte
registers have been read, preventing erroneous TACH
readings. The fan tachometer reading registers report back
PWM1
FAN 1
TACH 1
TACH 5
FAN 3
PWM3
PWM2
FAN 2
TACH 3
TACH 7
FAN 4
PWM4
the number of 11.11 m s period clocks (90 kHz oscillator)
gated to the fan speed counter, from the rising edge of the
first fan TACH pulse to the rising edge of the third fan TACH
pulse (because two pulses per revolution are being counted).
Because the device is essentially measuring the fan TACH
period, the higher the count value, the slower the fan is
actually running. A 16-bit fan tachometer reading of
0xFFFF indicates either that the fan has stalled or is running
very slowly (< 100 rpm).
The actual fan TACH period is being measured; therefore,
an ALERT is generated if the reading falls below a fan
TACH limit. This ALERT sets the appropriate status bit and
can be used to generate an SMBALERT. The TACH limit is
an 8-bit value that is compared with the TACH high byte of
Figure 49. Driving and Measuring the Speed on a
Single Fan
The PWM output is pulse stretched until a valid TACH is
read on both TACH inputs synchronized to the particular
PWM output. If one fan is connected to one PWM output,
the PWM output is pulse stretched until the counter has
timed out on the disconnected TACH input. In this case, the
the TACH reading.
Table 25. TACHOMETER VALUE & LIMIT REGISTERS
Low Byte High Byte 8-bit Limit
TACH Value Register Value Register Register
TACH1 0x98 0x99 0x78
TACH2 0x9A 0x9B 0x79
pulse is stretching longer than necessary in an effort to sense
a disconnected fan. The speed of the connected fan may be
increased and an audible change in fan speed may be
observed. There are two options to prevent the PWM output
from being stretched longer than necessary in this case.
? Connect the two synchronized TACH inputs together;
for example, if PWM1 is driving a single fan being
TACH3
TACH4
TACH5
TACH6
TACH7
TACH8
0x9C
0x9E
0xA2
0xA4
0xA6
0xA8
0x9D
0x9F
0xA3
0xA5
0xA7
0xA9
0x7A
0x7B
0x7C
0x7D
0x7E
0x7F
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