参数资料
| 型号： | ADT7462ZEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 27/82页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADT7462 |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi |
| 标准包装： | 1 |
| 类型： | 温度传感器 |
| 适用于相关产品： | ADT7462 |
| 所含物品： | 评估板 |
| 其它名称： | EVAL-ADT7462EBZ EVAL-ADT7462EBZ-ND |
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ADT7462
Example
VID high limit: 100 mV (Register 0x78), four MSBs set to
0100.
VID low limit: 50 mV (Register 0x78), four LSBs set to 0100.
VID value equates to 1.1 V. This is the read VID decoded,
using either VR10 or VR11 tables.
V CCP1 must be in the window of 1.05 V to 1.2 V. If the
V CCP1 value is outside this window, the status bit is set and
an ALERT is generated.
To clear an ALERT generated in this way, read the digital
ALERT Output
The ADT7462 has an SMBus ALERT output that is
asserted when one of the status bits is set. This is to alert the
master that an out-of-limit measurement has taken place or
that there is a fault on one of the fan channels.
An ALERT is generated as a result of a status bit being set
in any of the registers.
HIGH LIMIT
TEMPERATURE
status register. If the VID code and V CCP are now matching
within the programmed window (that is, the error condition
that caused the ALERT has gone away), then the status bit
STICKY
STATUS BIT
CLEARED ON READ
(TEMP BELOW LIMIT)
SMBALERT
is reset and so is the ALERT.
The VID to V CCP voltage tables for both VR10 and VR11
can be found on the Intel website. See the Voltage Regulator
Module (VRM) and Enterprise Voltage Regulator-Down
(EVRD) 10.0 Design Guidelines, Page 18 and Page 19, for
additional information.
Status and Mask Registers and ALERT
Status Registers
Each measured temperature and voltage has an associated
high and low limit. The measured values are compared with
these programmable limits. The results of these
comparisons are stored in the status registers. A Logic 0 in
the status register represents an in-limit comparison, while
a Logic 1 represents an out-of-limit comparison.
Once a status bit is set, it remains set until the status
register is read by the SMBus master. Once read, the status
bit is cleared if the error condition has gone away. The status
registers are duplicated to accommodate situations where
there are two SMBus masters. If one master reads the host
status registers and consequently clears them, the second
master has no way of knowing what bits were set and what
bits were cleared. The second SMBus master can read from
the duplicate BMC status registers to determine which status
TEMP BACK IN LIMIT
(STATUS BIT STAYS
SET)
Figure 38. ALERT and Status Bit Behavior
Figure 38 shows how the ALERT output and “sticky”
status bits behave. When a limit is exceeded, the
corresponding status bit is set to 1. The status bit remains set
until the error condition goes away and the status register is
read. The status bits are referred to as sticky because they
remain set until read by software. This ensures that an
out-of-limit event cannot be missed, if software is polling
the device periodically. Note that the ALERT output remains
low for the entire duration that a reading is out of limit and
until the status register has been read.
Mask Registers
The user has the option of maskin g any of the individual
status bits that generate an ALERT. This is achieved by
setting the appropriate bit in the mask registers. The ALERT
output is not asserted on the setting of a status bit if it has
been masked. The status bit itself is not affected and
continues to be set when an out-of-limit condition exists.
Table 24 is a list of the mask registers and corresponding
addresses.
bits were set.
Table 23 is a list of the status registers and corresponding
addresses.
Table 23. STATUS REGISTERS
Table 24. MASK REGISTERS
Register Name
Thermal Mask Register 1
Thermal Mask Register 2
Register Address
0x30
0x31
Register Name
Thermal Status Register 1
Thermal Status Register 2
Thermal Status Register 3
Voltage Status Register 1
Host
Address
0xB8
0xB9
0xBA
0xBB
BMC
Address
0xC0
0xC1
?
0xC3
Voltage Mask Register 1
Voltage Mask Register 2
Fan Mask Register
Digital Mask Register
GPIO Mask Register
0x32
0x33
0x34
0x35
0x36
Voltage Status Register 2
Fan Status Register 1
Digital Status Register 1
GPIO Status Register
0xBC
0xBD
0xBE
0xBF
0xC4
0xC5
0xC6
?
Fan Control
Fan Drive Using PWM Control
The ADT7462 uses pulse-width modulation (PWM) to
control fan speed. Control relies on varying the duty cycle
http://onsemi.com
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| ADT7463 | 制造商:AD 制造商全称:Analog Devices 功能描述:dB COOL Remote Thermal Controller and Voltage Monitor |
| ADT7463ARQ | 功能描述:IC REMOTE THERMAL CTRLR 24-QSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 热管理 系列:dBCool® 标准包装:1 系列:- 功能:温度监控系统（传感器） 传感器类型:内部和外部 感应温度:-40°C ~ 125°C，外部传感器 精确度:±2.5°C 本地（最大值），±5°C 远程（最大值） 拓扑:ADC，比较器，寄存器库 输出类型:2 线 SMBus? 输出警报:无 输出风扇:无 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:SOT-23-8 供应商设备封装:SOT-23-8 包装:Digi-Reel® 其它名称:296-22675-6 |
| ADT7463ARQ-REEL | 功能描述:IC SENSOR TEMP FAN-CTRL 24QSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 热管理 系列:dBCool® 标准包装:1 系列:- 功能:温度监控系统（传感器） 传感器类型:内部和外部 感应温度:-40°C ~ 125°C，外部传感器 精确度:±2.5°C 本地（最大值），±5°C 远程（最大值） 拓扑:ADC，比较器，寄存器库 输出类型:2 线 SMBus? 输出警报:无 输出风扇:无 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:SOT-23-8 供应商设备封装:SOT-23-8 包装:Digi-Reel® 其它名称:296-22675-6 |
| ADT7463ARQ-REEL7 | 功能描述:IC SENSOR TEMP FAN-CTRL 24QSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 热管理 系列:dBCool® 标准包装:1 系列:- 功能:温度监控系统（传感器） 传感器类型:内部和外部 感应温度:-40°C ~ 125°C，外部传感器 精确度:±2.5°C 本地（最大值），±5°C 远程（最大值） 拓扑:ADC，比较器，寄存器库 输出类型:2 线 SMBus? 输出警报:无 输出风扇:无 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:SOT-23-8 供应商设备封装:SOT-23-8 包装:Digi-Reel® 其它名称:296-22675-6 |
| ADT7463ARQZ | 功能描述:马达/运动/点火控制器和驱动器 SYS MGMT CNTRLR IC RoHS:否 制造商:STMicroelectronics 产品:Stepper Motor Controllers / Drivers 类型:2 Phase Stepper Motor Driver 工作电源电压:8 V to 45 V 电源电流:0.5 mA 工作温度:- 25 C to + 125 C 安装风格:SMD/SMT 封装 / 箱体:HTSSOP-28 封装:Tube |
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