参数资料
型号: ADT7462ZEVB
厂商: ON Semiconductor
文件页数: 61/82页
文件大小: 0K
描述: BOARD EVALUATION FOR ADT7462
产品变化通告: MFG CHG Notification ADI to ON Semi
标准包装: 1
类型: 温度传感器
适用于相关产品: ADT7462
所含物品: 评估板
其它名称: EVAL-ADT7462EBZ
EVAL-ADT7462EBZ-ND
ADT7462
Table 35. REGISTER 0X00 ? CONFIGURATION REGISTER 0 (Note 1)
Bit
[5:0]
6
7
Name
#Bytes Block
Read
VID Decoder
SW Reset
R/W
R/W
R/W
R/W
Description
These bits set the number of registers to be read in a block read. Default = 0x20.
0 = VR10 Decoding Spec; 1 = VR11 Decoding Spec. Default = 0.
Setting this bit to 1 restores all unlocked registers to their default values. Self-clearing. Write
0x6D to register 0x7B before setting this bit to get a software reset. Default = 0.
1. POR = 0x20, Lock = Y, SW Reset = Y.
Table 36. REGISTER 0X01 ? CONFIGURATION REGISTER 1 (Note 1)
Bit
0
1
2
3
4
5
6
7
Name
Monitor
Reserved
Reserved
ALERT Mode
Disable Fast
Spin-Up
Setup Complete
Lock
RDY
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Write
Once
R
Description
Setting this bit to 1 enables temperature and voltage measurements. When this bit is set to 0,
temperature and voltage measurements are disabled. Default = 1.
Reserved. Default = 0.
Reserved. Default = 0.
This bit sets the ALERT mode in the ADT7462. 1 = comparator mode, 0 = SMBALERT mode
(Default).
Setting this bit to 1 disables the fast spin-up (for two TACH pulses) for the fans. Instead, the
fans spin up for the programmed fan startup timeout. Default = 0.
Setting this bit to 1 tells the ADT7462 that setup is complete and that monitoring of all selected
channels should begin. Default = 0.
Logic 1 locks all limit values at their current settings. When this bit is set, all lockable registers
become read-only and cannot be modified until the ADT7462 is powered down and powered
up again. This prevents rogue programs, such as viruses, from modifying critical system limit
settings. Lockable.
This bit is set to 1 to indicate that the ADT7462 is fully powered up and ready to start
monitoring.
1. POR = 0x81, Lock = Y, SW Reset = Y.
Table 37. REGISTER 0X02 ? CONFIGURATION REGISTER 2 (Note 1)
Bit
0
1
2
3
4
5
[7:6]
Name
FAST
Reserved
PWM Mode
VRD1 Boost
VRD2 Boost
Fans Full Speed
#TACH Pulses
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
In low frequency, PWM fan speed measurements are made once a second. Setting this bit to 1
increases the frequency of the fan speed measurements to 4 times a second. Default = 0.
Reserved. Default = 0.
This bit sets the PWM frequency mode. 0 = low frequency PWM; frequency programmable
between 11 Hz and 88.2 Hz. Default = 35.3 Hz. 1 = high frequency mode, 22.5 kHz.
Setting this bit to 0 causes the fans to go to full speed on assertion of VRD1. Default = 0.
When this bit is set to 1, VRD1 assertions have no effect on the fan speed.
Setting this bit to 0 causes the fans to go to full speed on assertion of VRD2. Default = 0.
When this bit is set to 1, VRD2 assertions have no effect on the fan speed.
Setting this bit to 1 drives the fans to full speed. Default = 0.
In low frequency mode, the ADT7462 must pulse stretch to get an accurate fan speed
measurement. The speed is always measured between the 2nd rising edge and one ? TACH
pulses later. This bit determines the last TACH pulse. Therefore, if the fan speed is to be
measured between the second and fourth TACH pulse, 01 is written to these bits.
x = 1 = 00
x = 2 = 01
x = 3 = 10 (Default)
x = 4 = 11
1. POR = 0x80, Lock = Y, SW Reset = Y.
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