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| 型号： | ADUC832BCPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 58/92页 |
| 文件大小： | 0K |
| 描述： | IC MCU 62K FLASH ADC/DAC 56LFCSP |
| 标准包装： | 1 |
| 系列： | MicroConverter® ADuC8xx |
| 核心处理器： | 8052 |
| 芯体尺寸： | 8-位 |
| 速度： | 16MHz |
| 连通性： | EBI/EMI，I²C，SPI，UART/USART |
| 外围设备： | PSM，温度传感器，WDT |
| 输入/输出数： | 34 |
| 程序存储器容量： | 62KB（62K x 8） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 4K x 8 |
| RAM 容量： | 2.25K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 数据转换器： | A/D 8x12b，D/A 2x12b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 56-VFQFN 裸露焊盘，CSP |
| 包装： | 托盘 |
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Data Sheet
ADuC832
Rev. B | Page 61 of 92
OVERVIEW
The main features of the MicroConverter I2C interface are:
Only two bus lines are required; a serial data line (SDATA)
and a serial clock line (SCLOCK).
An I2C master can communicate with multiple slave
devices. Because each slave device has a unique 7-bit
address, single master/slave relationships can exist at all
times even in a multislave environment (Figure 64).
On-chip filtering rejects <50 ns spikes on the SDATA and
the SCLOCK lines to preserve data integrity.
DVDD
I2C
MASTER
SLAVE 1
SLAVE 2
02987-
053
Figure 64. Typical I2C System
SOFTWARE MASTER MODE
The ADuC832 can be used as an I2C master device by
configuring the I2C peripheral in master mode and writing
software to output the data bit by bit. This is referred to as a
software master. Master mode is enabled by setting the I2CM
bit in the I2CCON register.
To transmit data on the SDATA line, MDE must be set to enable
the output driver on the SDATA pin. If MDE is set, then the
SDATA pin is pulled high or low depending on whether the
MDO bit is set or cleared. MCO controls the SCLOCK pin and
is always configured as an output in master mode. In master mode,
the SCLOCK pin is pulled high or low depending on the
whether MCO is set or cleared.
To receive data, MDE must be cleared to disable the output
driver on SDATA. Software must provide the clocks by toggling
the MCO bit and reading the SDATA pin via the MDI bit. If
MDE is cleared, MDI can be used to read the SDATA pin. The
value of the SDATA pin is latched into MDI on a rising edge of
SCLOCK. MDI is set if the SDATA pin was high on the last
rising edge of SCLOCK. MDI is cleared if the SDATA pin was
low on the last rising edge of SCLOCK.
Software must control MDO, MCO, and MDE appropriately to
generate the start condition, slave address, acknowledge bits,
data bytes, and stop conditions appropriately. These functions
are provided in Technical Note uC001.
HARDWARE SLAVE MODE
After reset, the ADuC832 defaults to hardware slave mode.
The I2C interface is enabled by clearing the SPE bit in SPICON.
Slave mode is enabled by clearing the I2CM bit in I2CCON.
The ADuC832 has a full hardware slave. In slave mode, the I2C
address is stored in the I2CADD register. Data received or to be
transmitted is stored in the I2CDAT register.
Once enabled in I2C slave mode, the slave controller waits for a
start condition. If the ADuC832 detects a valid start condition,
followed by a valid address, followed by the R/W bit, the I2CI
interrupt bit is automatically set by hardware.
The I2C peripheral only generates a core interrupt if the user
has preconfigured the I2C interrupt enable bit (ESI) in the IEIP2
SFR, as well as the global interrupt bit (EA) in the IE SFR.
; Enabling I
2C Interrupts for the ADuC832
MOV IEIP2,#01H
; enable I
2C interrupt
SETB EA
On the ADuC832, an autoclear of the I2CI bit is implemented
so this bit is cleared automatically on a read or write access to
the I2CDAT SFR.
MOV
I2CDAT, A
; I2CI autocleared
MOV
A, I2CDAT
; I2CI autocleared
If for any reason the user tries to clear the interrupt more than
once, that is, access the data SFR more than once per interrupt,
then the I2C controller stops. The interface then must be reset
using the I2CRS bit.
The user can choose to poll the I2CI bit or enable the interrupt.
In the case of the interrupt, the PC counter vectors to 003BH at
the end of each complete byte. For the first byte, when the user
reaches the I2CI interrupt service routine (ISR), the 7-bit
address and the R/W bit appear in the I2CDAT SFR.
The I2CTX bit contains the R/W bit sent from the master. If
I2CTX is set, then the master waits to receive a byte. Thus the
slave transmits data by writing to the I2CDAT register. If I2CTX
is cleared, the master transmits a byte. Therefore, the slave receives
a serial byte. The software can check the state of I2CTX to
determine whether it should write to or read from I2CDAT.
Once the ADuC832 has received a valid address, the hardware
hold SCLOCK low until the I2CI bit is cleared by software. This
allows the master to wait for the slave to be ready before
transmitting the clocks for the next byte.
The I2CI interrupt bit is set every time a complete data byte is
received or transmitted, provided it is followed by a valid ACK.
If the byte is followed by a NACK, an interrupt is not generated.
The ADuC832 continues to issue interrupts for each complete
data byte transferred until a stop condition is received or the
interface is reset.
When a stop condition is received, the interface resets to a state
where it is waiting to be addressed (idle). Similarly, if the
interface receives a NACK at the end of a sequence, it also returns
to the default idle state. The I2CRS bit can be used to reset the
I2C interface. This bit can be used to force the interface back to
the default idle state.
It should be noted that there is no way (in hardware) to distinguish
between an interrupt generated by a received start plus valid
address and an interrupt generated by a received data byte. User
software must be used to distinguish between these interrupts.
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相关代理商/技术参数 |
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| ADUC832BCPZ-REEL | 功能描述:IC MCU 62K FLASH ADC/DAC 56LFCSP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 标准包装:38 系列:Encore!® XP® 核心处理器:eZ8 芯体尺寸:8-位 速度:5MHz 连通性:IrDA，UART/USART 外围设备:欠压检测/复位，LED，POR，PWM，WDT 输入/输出数:16 程序存储器容量:4KB（4K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:1K x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 3.6 V 数据转换器:- 振荡器型:内部 工作温度:-40°C ~ 105°C 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 包装:管件 其它名称:269-4116Z8F0413SH005EG-ND |
| ADUC832BS | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 62KB Flash 3.3V/5V 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 62KB FLASH 16.78MHZ 3.3/5V 52MQFP - Bulk 制造商:Analog Devices 功能描述:8BIT MCU +12BIT ADC LQFP52 832 |
| ADUC832BS-REEL | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 62KB Flash 3.3V/5V 52-Pin MQFP T/R |
| ADUC832BSZ | 功能描述:IC ADC/DAC 12BIT W/MCU 52MQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 标准包装:250 系列:56F8xxx 核心处理器:56800E 芯体尺寸:16-位 速度:60MHz 连通性:CAN，SCI，SPI 外围设备:POR，PWM，温度传感器，WDT 输入/输出数:21 程序存储器容量:40KB（20K x 16） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:6K x 16 电压 - 电源 (Vcc/Vdd):2.25 V ~ 3.6 V 数据转换器:A/D 6x12b 振荡器型:内部 工作温度:-40°C ~ 125°C 封装/外壳:48-LQFP 包装:托盘 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| ADUC832BSZ-REEL | 功能描述:IC MCU 62K FLASH ADC/DAC 52MQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 标准包装:38 系列:Encore!® XP® 核心处理器:eZ8 芯体尺寸:8-位 速度:5MHz 连通性:IrDA，UART/USART 外围设备:欠压检测/复位，LED，POR，PWM，WDT 输入/输出数:16 程序存储器容量:4KB（4K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:1K x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 3.6 V 数据转换器:- 振荡器型:内部 工作温度:-40°C ~ 105°C 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 包装:管件 其它名称:269-4116Z8F0413SH005EG-ND |
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