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参数资料
| 型号： | Alert on LAN ASIC |
| 厂商： | Intel Corp. |
| 英文描述： | System Monitoring Instrumentation Device(系统监控指示设备) |
| 中文描述： | 系统监测仪器设备（系统监控指示设备） |
| 文件页数： | 3/36页 |
| 文件大小： | 231K |
| 代理商： | ALERT ON LAN ASIC |
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Datasheet
iii
Networking Silicon — Alert on LAN* ASIC
Contents
1.0
INTRODUCTION..........................................................................................................................1
1.1
Alert on LAN Overview....................................................................................................1
1.2
Management Overview ...................................................................................................1
1.3
Alert on LAN Feature Set ................................................................................................2
1.4
Specifications and Standards Compliance......................................................................2
2.0
ALERT ON LAN ASIC ARCHITECTURAL OVERVIEW.............................................................3
2.1
TCO Interface..................................................................................................................3
2.2
SMB Interface..................................................................................................................5
2.3
EEPROM Interface..........................................................................................................5
2.4
Event Interface ................................................................................................................6
2.4.1
New Event Definition and Results......................................................................6
2.4.2
External Events ..................................................................................................7
2.4.3
Event 1, Sticky Latch Clearing Mechanism........................................................8
2.4.4
Event 4, Link Detect and Packet Transmission Interrupt....................................8
2.4.5
Watchdog Event.................................................................................................8
2.4.6
Software Event...................................................................................................9
2.4.7
Polarity Functionality ..........................................................................................9
2.4.8
Event Status Mask and SMI Mask .....................................................................9
2.4.9
New Event Packet Transmissions......................................................................9
2.5
Event Timers .................................................................................................................10
2.6
Synchronous RAM and Packet Control.........................................................................11
2.7
Clock Synchronization Logic .........................................................................................11
2.8
SMI Logic ......................................................................................................................11
2.9
Miscellaneous Logic......................................................................................................12
3.0
SIGNAL DESCRIPTION ............................................................................................................13
3.1
Signal Type Definition ..................................................................................................13
3.2
Clock Signals ................................................................................................................13
3.3
SMB Interface Signals ..................................................................................................13
3.4
82558 B-step Flash Interface Signals ..........................................................................14
3.5
EEPROM Interface Signals ..........................................................................................15
3.6
Alert/SOS Events Signals .............................................................................................15
3.7
Miscellaneous Signals ..................................................................................................15
3.8
Power and Ground Signals ..........................................................................................16
4.0
CONFIGURATION AND STATUS REGISTERS.......................................................................17
4.1
Register Bit Types ........................................................................................................17
4.2
Register 0h; Revision ID................................................................................................17
4.3
Register 1h; Event Status..............................................................................................17
4.4
Register 2h; Event Polarity............................................................................................18
4.5
Register 3h; Event Mask ...............................................................................................19
4.6
Register 4h; SMI Mask..................................................................................................19
4.7
Register 5h; Watchdog Status Byte ..............................................................................20
4.8
Register 6h; Watchdog Timer........................................................................................20
4.9
Register 7h; Heartbeat Timer........................................................................................20
4.10
Register 8h; Retransmission Timer...............................................................................21
4.11
Register 9h; Control ......................................................................................................22
4.12
Register Ah; Software Status Byte 1.............................................................................22
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