参数资料
型号: Alert on LAN ASIC
厂商: Intel Corp.
英文描述: System Monitoring Instrumentation Device(系统监控指示设备)
中文描述: 系统监测仪器设备(系统监控指示设备)
文件页数: 7/36页
文件大小: 231K
代理商: ALERT ON LAN ASIC
Datasheet
3
Networking Silicon — Alert on LAN* ASIC
2.0
Alert on LAN ASIC Architectural Overview
The internal architecture of the Alert on LAN ASIC is shown in
Figure 1, “Alert on LAN ASIC
Block Diagram”
on the front cover.
2.1
TCO Interface
The TCO interface is a proprietary General Purpose Input/Output (GPIO) type of interface to the
82558B. It is an 8-bit parallel data interface along with several control signals. This interface is a
unidirectional data bus. Data can only be transmitted from the Alert on LAN ASIC to the 82558B.
The TCO Read Request (TRDREQ) and TCO Active (TACTIVE) signals provide a handshaking
mechanism that allows a GPIO type of interface.
The TCO Marker (TMARKER) pin is a signal that indicates whether the data on the bus is a
command byte or a data byte. It is used to delineate datagrams on the TCO data bus.
The only command that the Alert on LAN ASIC uses on the TCO bus is the Transmit command.
The format for the Transmit command on the TCO Marker (TMARKER) and TCO Data
(TDATA[7:0]) lines to the 82558B is shown below.
Additional signals are used to put the 82558B in or out of TCO mode.
The TCO Force (TFORCE) signal is an active high input that forces the 82558B into TCO mode.
TFORCE is also used to end a TCO transaction. TFORCE will be forced inactive when any of the
following conditions occur:
Both the PCI Reset signal (PCI_RST#) and Main Power Good signal (PWR_GOOD) are
active.
The 82558 Software Reset (CTL_558RST) bit in the Control register is set (
Section 4.11,
“Register 9h; Control” on page 22
).
The Transmit Enable (CTL_TXEN) bit in the Control register is cleared (
Section 4.11,
“Register 9h; Control” on page 22
).
The TCO Ready Active (CTL_TRDY) bit in the Control register is set (
Section 4.11, “Register
9h; Control” on page 22
) and the TCO Ready (TREADY#) signal is inactive.
TMARKER
TDATA[7:0] Bus
1
04h
0
FFh
0
00h
0
Data Byte 0
0
Data Byte 1
0
Data Byte 2
0
...
0
Data Byte N
1
00h
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