参数资料
型号: BR25S128GUZ-WE2
厂商: Rohm Semiconductor
文件页数: 12/26页
文件大小: 0K
描述: IC EEPROM SPI 128KB 12-WLCSP
标准包装: 1
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 128K (16K x 8)
速度: 10MHz
接口: SPI 3 线串行
电源电压: 1.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 12-XFBGA,CSPBGA
供应商设备封装: VCSP35L2
包装: 标准包装
其它名称: BR25S128GUZ-WE2DKR
BR25S128GUZ-W
(128K)
Datasheet
● Features
○ Status registers
This IC has status register. The status register expresses the following parameters of 8 bits.
BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore are
valid even when power source is turned off.
Rewrite characteristics and data hold time are same as characteristics of the EEPROM.
WEN can be set by write enable command and write disable command. WEN becomes write disable status when power
source is turned off. R/B is for write confirmation, therefore cannot be set externally.
The value of status register can be read by read status register command.
1. Contexture of status register
Product number bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
BR25S128GUZ-W
WPEN
0
0
0
BP1
BP0
WEN
R/B
bit
WPEN
BP1
BP0
WEN
R/B
Memory
location
EEPROM
EEPROM
registers
registers
Function
WP pin enable / disable designation bit
WPEN=0=invalid
WPEN=1=valid
EEPROM write disable block designation bit
Write and write status register write enable / disable status confirmation bit
WEN=0=prohibited
WEN=1=permitted
Write cycle status (READY / BUSY) status confirmation bit
R/B=0=READY
R/B=1=BUSY
2. Write disable block setting
BP1 BP0
Write disable block
BR25S128GUZ-W
0 0 None
0 1 3000h-3FFFh
1 0 2000h-3FFFh
1 1 0000h-3FFFh
WP pin
By setting WP=LOW, write command is prohibited. And the write command to be disabled at this moment is WRSR.
However, when write cycle is in execution, no interruption can be made.
Product number
BR25S128GUZ-W
WRSR
Prohibition possible
but WPEN bit “1”
WRITE
Prohibition
impossible
○ HOLDB pin
By HOLDB pin, data transfer can be interrupted. When SCK=”0”, by making HOLDB from “1” into”0”, data transfer to
EEPROM is interrupted. When SCK = “0”, by making HOLDB from “0” into “1”, data transfer is restarted.
www.rohm.com
?2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
12/23
TSZ02201-0R2R0G100310-1-2
19.Jul.2012 Rev.001
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