参数资料
型号: BR25S128GUZ-WE2
厂商: Rohm Semiconductor
文件页数: 15/26页
文件大小: 0K
描述: IC EEPROM SPI 128KB 12-WLCSP
标准包装: 1
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 128K (16K x 8)
速度: 10MHz
接口: SPI 3 线串行
电源电压: 1.7 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 12-XFBGA,CSPBGA
供应商设备封装: VCSP35L2
包装: 标准包装
其它名称: BR25S128GUZ-WE2DKR
BR25S128GUZ-W
(128K)
Datasheet
● WP cancel valid area
WP is normally fixed to “H” or “L” for use, but when WP is controlled so as to cancel write status register command, pay
attention to the following WP valid timing.
While write status register command is executed, by setting WP = “L” in cancel valid area, command can be cancelled. The
area from command ope code to CSB rise at internal automatic write start becomes the cancel valid area. However, once
write is started, by any input write cycle cannot be cancelled. WP input becomes Don’t Care, and cancellation becomes
invalid.
SCK
6
Ope Code
7
Data
15
16
tE/W
Data write time
Valid
(WRSR command is reset by WPB=L)
Invalid
Figure 36. WP valid timing (At inputting WRSR command)
● HOLDB pin
By HOLDB pin, command communication can be stopped temporarily (HOLD status). The command communications are
carried out when the HOLDB pin is HIGH. To get in HOLD status, at command communication, when SCK=LOW, set the
HOLDB pin LOW. At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z). To release
the HOLD status, set the HOLDB pin HIGH when SCK=LOW. After that, communication can be restarted from the point
before the HOLD status. For example, when HOLD status is made after A5 address input at read, after release of HOLD
status, by starting A4 address input, read can be restarted. When in HOLD status, keep CSB LOW. When it is set
CSB=HIGH in HOLD status, the IC is reset, therefore communication after that cannot be restarted.
www.rohm.com
?2012 ROHM Co., Ltd. All rights reserved.
TSZ22111 ? 15 ? 001
15/23
TSZ02201-0R2R0G100310-1-2
19.Jul.2012 Rev.001
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