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参数资料
| 型号： | BX805555030P |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 64-BIT, MICROPROCESSOR, BGA771 |
| 封装： | LGA-771 |
| 文件页数： | 81/104页 |
| 文件大小： | 3690K |
| 代理商： | BX805555030P |
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Thermal Specifications
78
Dual-Core Intel Xeon Processor 5000 Series Datasheet
the system tries to enable On-Demand mode at the same time the TCC is engaged, the
factory configured duty cycle of the TCC will override the duty cycle selected by the On-
Demand mode.
6.2.3
PROCHOT# Signal
An external signal, PROCHOT# (processor hot) is asserted when the processor die
temperature has reached its factory configured trip point. If Thermal Monitor is enabled
(note that Thermal Monitor must be enabled for the processor to be operating within
specification), the TCC will be active when PROCHOT# is asserted. The processor can
be configured to generate an interrupt upon the assertion or de-assertion of
PROCHOT#. Refer to the Intel Architecture Software Developer’s Manual for specific
register and programming details.
PROCHOT# is designed to assert at or a few degrees higher than maximum TCASE (as
specified by Thermal Profile A) when dissipating TDP power and cannot be interpreted
as an indication of processor case temperature. This temperature delta accounts for
processor package, lifetime and manufacturing variations and attempts to ensure the
Thermal Control Circuit is not activated below maximum TCASE when dissipating TDP
power. There is no defined or fixed correlation between the PROCHOT# trip
temperature, the case temperature or the thermal diode temperature. Thermal
solutions must be designed to the processor specifications and cannot be adjusted
based on experimental measurements of TCASE, PROCHOT#, or Tdiode on random
processor samples.
6.2.4
FORCEPR# Signal
The FORCEPR# (force power reduction) input can be used by the platform to cause the
Dual-Core Intel Xeon Processor 5000 series to activate the TCC. If the Thermal Monitor
is enabled, the TCC will be activated upon the assertion of the FORCEPR# signal.
Assertion of the FORCEPR# signal will activate TCC for both processor cores. The TCC
will remain active until the system deasserts FORCEPR#. FORCEPR# is an
asynchronous input. FORCEPR# can be used to thermally protect other system
components. To use the VR as an example, when FORCEPR# is asserted, the TCC
circuit in the processor will activate, reducing the current consumption of the processor
and the corresponding temperature of the VR.
It should be noted that assertion of FORCEPR# does not automatically assert
PROCHOT#. As mentioned previously, the PROCHOT# signal is asserted when a high
temperature situation is detected. A minimum pulse width of 500 s is recommended
when FORCEPR# is asserted by the system. Sustained activation of the FORCEPR#
signal may cause noticeable platform performance degradation. Refer to the
appropriate platform design guidelines for details on implementing the FORCEPR#
signal feature.
6.2.5
THERMTRIP# Signal
Regardless of whether or not Thermal Monitor is enabled, in the event of a catastrophic
cooling failure, the processor will automatically shut down when the silicon has reached
an elevated temperature (refer to the THERMTRIP# definition in Table 5-1). At this
point, the FSB signal THERMTRIP# will go active and stay active as described in
Table 5-1. THERMTRIP# activation is independent of processor activity and does not
generate any bus cycles. Intel also recommends the removal of VTT.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| BX805555050A S L96C | 制造商:Intel 功能描述:XEON PROCESSOR 5050 |
| BX805555060A S L96A | 制造商:Intel 功能描述:MPU Xeon 65nm 3.2GHz 771-Pin FCLGA6 |
| BX805555060P S L96A | 制造商:Intel 功能描述:MPU Xeon 制造商:Intel 功能描述:MPU Xeon? Processor 5060 65nm 3.2GHz 771-Pin FCLGA6 |
| BX805565120P S L9RY | 制造商:Intel 功能描述:MPU Xeon 制造商:Intel 功能描述:MPU Xeon? Processor 5120 RISC 64-Bit 65nm 1.86GHz 771-Pin LGA Box |
| BX805565130A S LAGC | 制造商:Intel 功能描述:5100 MEMORY CONTROLLER HUB CHIPSET |
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