参数资料
型号: CORE10/100-AR
厂商: Microsemi SoC
文件页数: 89/106页
文件大小: 0K
描述: IP CORE10/100 UNLIMITED RTL
标准包装: 1
系列: *
Core10100 v4.0
Transmit Descriptor and Data Fetches
Transmit Descriptor Fetch in 32-Bit Mode
Transmit Examples
1.
2.
3.
4.
5.
Read the first 32-bit word of transmit descriptor.
Read the second 32-bit word of transmit descriptor.
Read the third 32-bit word of transmit descriptor.
Read the first 32-bit data fetch and write into transmit FIFO.
Read the second 32-bit data fetch and write into transmit FIFO.
(5)
(1)
(2)
(3)
(4)
CLKDMA
CLKT
DATAACK
DATAREQ
DATARW
DATAI[31:0] 80000000
DATAADDR[31:0] FFFFFFFF
600007FF
00003004
00000000
00003008
TWE
TWADDR[8:0] 000
TWDATA[31:0] 00000000
TRADDR[8:0] 000
TRDATA[31:0] XXXXXXXX
TX_EN
TXD[3:0] F
Figure B-4 · Transmit Descriptor Fetch in 32-Bit Mode
Note: An extra cycle is inserted between any two descriptor fetches.
Transmit Descriptor and Data Fetch in 16-Bit Mode
1.
2.
3.
4.
5.
6.
7.
8.
9.
Read the first 16-bit word of transmit descriptor.
Read the second 16-bit word of transmit descriptor.
Read the third 16-bit word of transmit descriptor.
Read the fourth 16-bit word of transmit descriptor.
Read the fifth 16-bit word of transmit descriptor.
Read the sixth 16-bit word of transmit descriptor.
Read the first 16-bit data fetch and write into transmit FIFO.
Read the second 16-bit data fetch and write into transmit FIFO.
Read the third 16-bit data fetch and write into transmit FIFO.
10. Read the fourth 16-bit data fetch and write into transmit FIFO.
v4.0
89
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