参数资料
型号: CS61584A-IQ3Z
厂商: Cirrus Logic Inc
文件页数: 17/47页
文件大小: 0K
描述: IC LINE INTERFACE T1/E1 64LQFP
标准包装: 160
接口: 并行/串行
电源电压: 3.3V,5V
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 托盘
安装类型: 表面贴装
产品目录页面: 759 (CN2011-ZH PDF)
其它名称: 598-1713
CS61584A
24
DS261PP5
Latched-LOS: Set high on the rising edge of the
loss of signal condition. Reading the Status register
clears the Latched-LOS bit and deactivates the INT
pin. Refer to the timing diagram in Figure 18.
AIS: Set high while the alarm indication signal is
detected. Reading the Status register does not clear
the AIS bit. An AIS interrupt is generated only on
the falling edge of the AIS alarm condition. The
Latched-AIS bit generates an interrupt on the rising
edge of AIS. Refer to the timing diagram in
Figure 18.
Status Register (Channel 1)
Serial Port Address: 0x10; Parallel Port Address: 0xY0
Bit
Description
Definition
Reset
Value
10
7
LOS1
LOS currently detected
no LOS
1
6
Latched-LOS1
LOS event since last read
no LOS
1
5
AIS1
AIS currently detected
no AIS
0
4
Latched-AIS1
AIS event since last read
no AIS
0
3
Latched-BPV1
BPV event since last read
no BPV
0
2
Latched-Overflow1
Pulse overflow since last read
no overflow
0
1
Latched-Reset
Reset event since last read
no reset
1
0
Interrupt1
Interrupt event since last read
no interrupt
1
Status Register (Channel 2)
Serial Port Address: 0x11; Parallel Port Address: 0xY1
Bit
Description
Definition
Reset
Value
10
7
LOS2
LOS currently detected
no LOS
1
6
Latched-LOS2
LOS event since last read
no LOS
1
5
AIS2
AIS currently detected
no AIS
0
4
Latched-AIS2
AIS event since last read
no AIS
0
3
Latched-BPV2
BPV event since last read
no BPV
0
2
Latched-Overflow2
Pulse overflow since last read
no overflow
0
1
Latched-CLKLOST
TCLK or REFCLK absent
TCLK and REFCLK present
0
Interrupt2
Interrupt event since last read
no interrupt
1
Table 5. Status Registers
AIS/LOS Currently Active
(AIS/LOS bit & AIS/LOS pin)
Latched LOS
(Latch AIS/LOS bit)
Read AIS/LOS bits
"Short" AIS/LOS event
"Long" AIS/LOS event
Set by start
of AIS/LOS
Cleared by read
Set by Change
of AIS/LOS
Cleared by read
Interrupt
(INT)
Figure 18. Alarm Indication Event Relationships
CS61584A
24
DS261F1
相关PDF资料
PDF描述
CS61884-IRZ IC LN INTERF T1/E1/J1 160-LFBGA
CS8130-CS IC IR TRANSCEIVER 2-5V 20-SSOP
CS8190EDWF20G IC TACH/SPEEDO DRVR PREC 20SOICW
CS8191XNF16 IC DRVR AIRCORE TACH/SPEED 16DIP
CS82C5296 IC UART/BRG 5V 16MHZ 28-PLCC
相关代理商/技术参数
参数描述
CS61584A-IQ3ZR 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61584A-IQ5 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61584A-IQ5Z 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61584A-IQ5ZR 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
CS61584-IL3 制造商:未知厂家 制造商全称:未知厂家 功能描述:Line Interface