参数资料
| 型号： | CS61584A-IQ3Z |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 21/47页 |
| 文件大小： | 0K |
| 描述： | IC LINE INTERFACE T1/E1 64LQFP |
| 标准包装： | 160 |
| 接口： | 并行/串行 |
| 电源电压： | 3.3V，5V |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
| 产品目录页面： | 759 (CN2011-ZH PDF) |
| 其它名称： | 598-1713 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页当前第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页
CS61584A
28
DS261PP5
sate for waveform degradation that may result from
non-standard cables, transformers, or protection
circuitry.
Arbitrary waveform generation is enabled when the
CON[3:0] line configuration selection in the Con-
trol B register is set to one of four arbitrary wave-
form modes (See the Transmitter section). The
arbitrary pulse shape of mark (a transmitted "1") is
specified by describing the pulse shape across three
Unit Intervals (UIs). One UI in DS1 applications is
648 ns (1.544 MHz period) and one UI in E1 appli-
cations is 488 ns (2.048 MHz period). For example,
arbitrary waveform generation allows the DSX-1
return-to-zero "tail" to extend further into the next
UI or allows T1 long-haul waveforms to be defined
across all three UIs. The amplitude of a space (a
transmitted "0") is fixed at zero volts.
All three UIs are divided into 14 equal phases for a
total of 42 phase segments. The shape of the pulse
is then defined by writing the amplitude of each
phase segment to the Arbitrary Waveform register
42 times in sequence from UI1/phase1 to
UI3/phase14. The custom pulse shape must be de-
fined using the Arbitrary Waveform register before
setting the CON[3:0] configuration selection to one
of the arbitrary generation settings (i.e., 1001,
1010, or 1011).
For DS1 applications, the CS61584A divides the
648 ns UI into 14 equal phases of 46.3 ns. For
DSX-1 applications, the 648 ns UI is divided into
13 equal phases of 49.8 ns. The phase amplitude in-
formation written for phase 14 of each UI is ig-
nored. For E1 applications, the 488 ns UI is divided
into 12 equal phases of 40.7 ns. The phase ampli-
Arbitrary Waveform Register (Channel 1)
Serial Port Address: 0x18; Parallel Port Address: 0xY8
Bit
Description
Definition
Reset
Value
10
70
Arbitrary pulse shape definitions
undefined
6MSB
5
4
3
2
1
0LSB
Arbitrary Waveform Register (Channel 2)
Serial Port Address: 0x19; Parallel Port Address: 0xY9
Bit
Description
Definition
Reset
Value
10
7
0
Arbitrary pulse shape definitions
undefined
6MSB
5
4
3
2
1
0LSB
Table 9. Arbitrary Waveform Registers
CS61584A
28
DS261F1
相关PDF资料 |
PDF描述 |
|---|---|
| CS61884-IRZ | IC LN INTERF T1/E1/J1 160-LFBGA |
| CS8130-CS | IC IR TRANSCEIVER 2-5V 20-SSOP |
| CS8190EDWF20G | IC TACH/SPEEDO DRVR PREC 20SOICW |
| CS8191XNF16 | IC DRVR AIRCORE TACH/SPEED 16DIP |
| CS82C5296 | IC UART/BRG 5V 16MHZ 28-PLCC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS61584A-IQ3ZR | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584A-IQ5 | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584A-IQ5Z | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584A-IQ5ZR | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584-IL3 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Line Interface |
发布紧急采购，3分钟左右您将得到回复。