参数资料
| 型号： | CS61584A-IQ3Z |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 30/47页 |
| 文件大小： | 0K |
| 描述： | IC LINE INTERFACE T1/E1 64LQFP |
| 标准包装： | 160 |
| 接口： | 并行/串行 |
| 电源电压： | 3.3V，5V |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
| 产品目录页面： | 759 (CN2011-ZH PDF) |
| 其它名称： | 598-1713 |
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CS61584A
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DS261PP5
10.16 Exit1-IR State
This is a temporary state. While in this state, if J-
TMS is held high, a rising edge applied to J-TCK
causes the controller to enter the Update-IR state,
which terminates the scanning process. If J-TMS is
held low and a rising edge is applied to J-TCK, the
controller enters the Pause-IR state. The test data
register selected by the current instruction retains
its previous value and the instruction does not
change during this state.
10.17 Pause-IR State
The pause state allows the test controller to tempo-
rarily halt the shifting of data through the instruc-
tion register. The test data register selected by the
current instruction retains its previous value and
the instruction does not change during this state.
The controller remains in this state as long as J-
TMS is low. When J-TMS goes high and a rising
edge is applied to J-TCK, the controller moves to
the Exit2-IR state.
10.18 Exit2-IR State
This is a temporary state. While in this state, if J-
TMS is held high, a rising edge applied to J-TCK
causes the controller to enter the Update-IR state,
which terminates the scanning process. If J-TMS is
held low and a rising edge is applied to J-TCK, the
controller enters the Shift-IR state.
The test data register selected by the current in-
struction retains its previous value and the instruc-
tion does not change during this state.
10.19 Update-IR State
The instruction shifted into the instruction register
is latched into the parallel output from the shift-reg-
ister path on the falling edge of J-TCK. When the
new instruction has been latched, it becomes the
current instruction. The test data registers selected
by the current instruction retain their previous val-
ue.
10.20 JTAG Application Examples
the instruction and data registers during JTAG op-
eration.
CS61584A
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DS261F1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS61584A-IQ3ZR | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584A-IQ5 | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584A-IQ5Z | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584A-IQ5ZR | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584-IL3 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Line Interface |
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