参数资料
| 型号： | CS61584A-IQ3Z |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 40/47页 |
| 文件大小： | 0K |
| 描述： | IC LINE INTERFACE T1/E1 64LQFP |
| 标准包装： | 160 |
| 接口： | 并行/串行 |
| 电源电压： | 3.3V，5V |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
| 产品目录页面： | 759 (CN2011-ZH PDF) |
| 其它名称： | 598-1713 |
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CS61584A
DS261PP5
45
DS261PP5
Status
AIS1, AIS2 - Alarm Indication Signal [Host mode] (PLCC pins 15, 54; TQFP pins 6, 43)
The AIS indication goes high when the receiver detects 99.9% ones density in a 5.3 ms period (< 9
zeros in 8192 bits). The AIS indication returns low when the receiver detects
≥ 9 zeros in 8192 bits.
BPV1, BPV2 - Bipolar Violation [Host mode] (PLCC pins 12, 57; TQFP pins 3, 46)
The BPV indication goes high for one RCLK bit period when a bipolar violation is detected in the
received signal. Bipolar violations caused by B8ZS (or HDB3) zero substitutions are not flagged by the
BPV pin if the coder mode is enabled.
The BPV pin also goes high for one RCLK bit period on excessive zero events if EXZ = 1 (Control A
register, channel 2). In AMI mode, the BPV pin goes high when 16 or more zeros are received. In B8ZS
mode, the BPV pin goes high when 8 or more zeros are received. This functionality is disabled when
the device is configured for E1 operation.
LOS1 - Loss of Signal [Hardware mode and Host mode - serial port]
LOS2 - (PLCC pins 16, 53; TQFP pins 7, 42)
The LOS indication goes high when 175 ±15 consecutive zeros are received on the line interface, or
when the receive (RTIP/RRING) signal level drop below the receiver sensitivity of the device. The LOS
indication returns low when a minimum 12.5% ones density signal over 175 ±75 bit periods with no
more than 100 consecutive zeros is received.
Test
J-TCK - JTAG Test Clock (PLCC pin 51; TQFP pin 40)
Data on pins J-TDI and J-TDO is valid on the rising edge of J-TCK. When J-TCK is stopped low, all
JTAG registers remain unchanged.
J-TMS - JTAG Test Mode Select (PLCC pin 50; TQFP pin 39)
An active high signal on J-TMS enables the JTAG serial port. This pin has an internal pull-up resistor
and may be unconnected to float high or tied low while the JTAG interface is not active.
J-TDI - JTAG Test Data In (PLCC pin 19; TQFP pin 10)
JTAG data is shifted into the device on this pin. This pin has an internal pull-up resistor. Data must be
stable on the rising edge of J-TCK.
J-TDO - JTAG Test Data Out (PLCC pin 17; TQFP pin 8)
JTAG data is shifted out of the device on this pin. This pin is active only when JTAG testing is in
progress. J-TDO will be updated on the falling edge of J-TCK.
CS61584A
DS261F1
45
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS61584A-IQ3ZR | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584A-IQ5 | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584A-IQ5Z | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dual T1/ E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584A-IQ5ZR | 功能描述:网络控制器与处理器 IC IC 3.3V/5V Dul T1/E1 Line Intrfc Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| CS61584-IL3 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Line Interface |
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