参数资料
型号: DAC5687IPZPG4
厂商: TEXAS INSTRUMENTS INC
元件分类: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 0.0104 us SETTLING TIME, 16-BIT DAC, PQFP100
封装: GREEN, PLASTIC, HTQFP-100
文件页数: 57/79页
文件大小: 2490K
代理商: DAC5687IPZPG4
www.ti.com
Location of the Spurious Signals
fSIG/fDAC
0.5
0.4
0.3
0.2
0.1
0.0
0.1
0.2
0.3
0.4
0.5
0.0
0.1
0.2
0.3
0.4
0.5
Spurious
Frequency/f
D
A
C
G026
fSIG
fSIG fDAC/2
(a) Complex Output in X2 Mode
(b) Real Output in X2 Mode
fSIG/fDAC
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.0
0.1
0.2
0.3
0.4
0.5
Spurious
Frequency/f
D
A
C
G027
fSIG
fSIG fDAC/2
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
To calculate the nonharmonic clock-related spurious signals for a particular condition, we first determine the
location of the spurious signals and then the amplitude.
The location of the spurious signals is determined by the DAC5687 output frequency (fSIG) and whether the
output is used as a dual-output complex signal to be fed to an analog quadrature modulator (AQM) or as a real
IF signal from a single DAC output.
Figure 70 shows the location of spurious signals for X2 mode as a function of fSIG/fDAC. For complex outputs, the
spurious frequencies cover a range of –0.5
× f
DAC to 0.5 × fDAC, with the negative complex frequency indicating
that the spurious signal falls in the opposite sideband from the wanted signal at the output of the AQM. For the
real output, the phase information for the spurious signal is lost, and therefore what was a negative frequency for
the complex output is a positive frequency for a real output.
For the X2 mode, there is one spurious frequency with an absolute frequency less than 0.5
× f
DAC. For a complex
output in X2 mode, the spurious signal always is offset fDAC/2 from the wanted signal at fSIG – fDAC/2. For a real
output, as fSIG approaches fDAC/4, the spurious signal frequency falls at fDAC/2 – fSIG, which also approaches
fDAC/4.
Figure 70. Frequency of Clock Mixing Spurious Images in X2 Mode
Figure 71 shows the location of spurious signals for X4 and X4L mode as a function of fSIG/fDAC. The addition of
the fDAC/4 clock frequency for the first interpolation filter creates three new spurious signals. For a complex
output, the nearest spurious signals are fDAC/4 offset from fSIG. For a real output, the signal due to fSIG – fDAC/4
and fSIG – fDAC × 3/4 falls in band as fSIG approaches fDAC/8 and fDAC × 3/8. This creates optimum real output
frequencies fSIG = fDAC × N/16 (N = 1, 3, 5, and 7), where the minimum spurious product offset from fSIG is fDAC/8.
60
Copyright 2005–2006, Texas Instruments Incorporated
Product Folder Link(s): DAC5687
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