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| 型号： | DAC5687IPZPG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 0.0104 us SETTLING TIME, 16-BIT DAC, PQFP100 |
| 封装： | GREEN, PLASTIC, HTQFP-100 |
| 文件页数： | 61/79页 |
| 文件大小： | 2490K |
| 代理商： | DAC5687IPZPG4 |
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fSIG/fDAC
20
10
0
10
20
30
40
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
Amplitude
Adjustment
dB
G040
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
Figure 75. Amplitude Adjustment Factor for fSIG
The steps for calculating the nonharmonic spurious signals are:
1. Find the spurious signal frequencies for the appropriate mode from Figure 70, Figure 71, or Figure 72.
2. Find the amplitude for each spurious frequency for the appropriate mode from Figure 73 or Figure 74.
Consider Example 1 with the following conditions:
1. X4 Mode
2. PLL off
3. Complex output
4. fDAC = 500 MHz
5. fSIG = 160 MHz = 0.32 × fDAC
First, the location of the spurious signals is found for the X4 complex output in Figure 71(a). Three spurious
signals are present in the range –0.5
× f
DAC to 0.5 × fDAC: two from fDAC/4 (35 MHz and –215 MHz) and one from
fDAC/2 (–90 MHz). Consulting Figure 73(c), the raw amplitudes for fDAC/2 and fDAC/4 are 60 and 58 dBc,
respectively. From Figure 75, the amplitude adjustment factor for fSIG = 0.32 × fDAC is estimated at ~1 dB, and so
the fDAC/2 and fDAC/4 are adjusted to 61 and 59 dBc.
Table 16. Example # 1 for Calculating Spurious Signals
Spurious
Frequency
Frequency/fDAC
Raw Amplitude (dBc)
Adjusted Amplitude (dBc)
Signal
(MHz)
fDAC/4
0.07
35
58
59
fDAC/2
–0.18
–90
60
61
fDAC/4
–0.43
–215
58
59
Now consider Example 2 with the following conditions:
1. X2 Mode
2. PLL on
3. Real output
4. fDAC = 400 MHz
5. fSIG = 70 MHz = 0.175 × fDAC
64
Copyright 2005–2006, Texas Instruments Incorporated
Product Folder Link(s): DAC5687
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